3-26
Breaker Logic
Date Code 20010731
SEL-352-1, -2 Instruction Manual
Phase Overpower (37OP)
Range:
0.10–3400.00 W in 0.01-W steps (5 A)
0.02–680.00 W in 0.01-W steps (1 A)
Use
SET <ENTER>
to access the 37OP element setting. This setting establishes the power
level above which the model is heating and below which the model is cooling.
Negative-Sequence Overvoltage (47Q)
Range:
2.0–140.0 V in 0.1-V steps
The negative-sequence overvoltage element (47Q) is not used in the predefined thermal logic.
When the negative-sequence voltage (V
2
) for the X- or Y-side voltages exceeds the 47Q setting,
Relay Word bits X47Q or Y47Q assert, respectively. These two bits are inputs to a logical OR
gate whose output is Relay Word bit 47Q. Note that the 47Q voltage setting is in terms of V
2
,
not 3V
2
.
Thermal Model Voltage Threshold (87TH)
Range:
1.0–150.0 V in 0.1-V steps
Use
SET <ENTER>
to access the 87TH setting. SEL-352 Relay calculates a per-phase
difference voltage and compares this to the 87TH setting. The calculation includes error nulling,
discussed later in this section.
The value compared to the 87TH setting is the transient voltage difference across the breaker
prior to voltage nulling. When trip or close resistors are stuck in service, a difference voltage is
measured across the breaker pole. Set the 87TH so it will pick up for stuck resistors.
Voltage Nulling Delay (VNpu)
Range:
0.00–240.00 minutes in 0.01-minute steps
Use
SET <ENTER>
to access the VNpu setting. This setting defines the delay before the
system returns to a steady-state condition after switching operations.
The thermal logic, flashover logic (Scheme 1), and the potential transformer disagreement alarm
logic all consider calculations of the voltage nulling logic. Potential transformers on either side
of a breaker typically will not have identical measurements due to potential transformer physical
differences. The differences between the potential transformers can appear as difference voltage
across the breaker. The voltage nulling logic eliminates the difference between the two
measurements for steady-state conditions. Refer to Figure 3.20
for a logic diagram of the logic.
The voltage difference is nulled when all of the following conditions have been true for a
settable time:
Breaker is closed for the particular phase
No trip input is received for the particular phase
No close input is received
Both X- and Y-side voltages are live for the particular phase
Содержание SEL-352-1
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