Date Code 20010731
Control Logic
5-11
SEL-352-1, -2 Instruction Manual
Many Relay Word bits assert based on a comparison of the analog input to a relay setting or the
combination of analog quantities and/or settings. These comparisons are used throughout the
relay logic and are represented in the logic diagrams by symbols similar to those in Figure 5.3.
Figure 5.3 shows that the Y-side A-, B-, and C-phase voltage inputs are compared to the 59L
setting to determine the Y59LA, Y59LB, and Y59LC Relay Word bit status. If the A-phase
RMS voltage exceeds the 59L setting, Y59LA becomes a logical 1. As soon as the magnitude of
the voltage drops below the setting threshold, Y59LA returns to a logical 0. If Y59LA, Y59LB,
and Y59LC pick up, the Y59L3 Relay Word bit asserts, indicating all three phases are high.
Each of the general elements, other than the delay outputs, are processed every 1/8-cycle. Refer
to
Appendix F: Relay Word
for a description of each individual Relay Word bit.
The analog comparison process has been expanded in this relay through the use of SEL
OGIC
control equation Analog Compares, discussed earlier in this section.
O
PTOISOLATED
I
NPUTS
Relay Word bits IN101 through IN316 follow optoisolated inputs IN101 through IN316,
respectively, if the input/output board configuration supports them.
Section 2: Installation
gives
a description of the optional I/O boards that are available and the number of inputs they support.
See Figure 5.4 for an example of an energized and de-energized optoisolated input and
corresponding Relay Word bit states. Note the built-in pickup and dropout times of 0.125 cycles
for energization or de-energization debounce. Use SEL
OGIC
control equation timers for
additional debounce time, if necessary.
There are no optoisolated input settings such as:
IN101
=
IN102
=
In Figure 5.4, optoisolated inputs IN101 and IN102 receive their function by how their
corresponding Relay Word bits IN101 and IN102 are used in SEL
OGIC
control equations such as
in the input assignment variables. The optoisolated input elements are processed every 1/8
cycle.
Figure 5.4: Example Operation of Optoisolated Inputs IN101 and IN102
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