R01UH0092EJ0110 Rev.1.10
Page 696 of 807
Jul 31, 2012
M16C/64C Group
30. Flash Memory
30.8.7
Status Register
The status register indicates flash memory operating state and whether or not an erase or program
operation has been completed as expected.
Bits FMR00, FMR06, and FMR07 in the FMR0 register indicate status register states. Refer to 30.3.1
“Flash Memory Control Register 0 (FMR0)” for a description of each bit.
Table 30.17
Difference in Reading of Status Register
Item
FMR0 register
Command
Condition
No limit
Reading
procedure
Read bits FMR00, FMR06,
and FMR07 in the FMR0
register
• Read any even address in program ROM 1, program
ROM 2, or data flash after writing the read status register
command.
• Read any even address in program ROM 1, program
ROM 2, or data flash after executing the program
command, block erase command, lock bit program
command, or block blank check command before
executing the read array command.
Table 30.18
Status Register
Bits in Status
Register
Bit in FMR0
Register
Status
Status
Reset Value
0
1
SR0 (D0)
-
Reserved
-
-
-
SR1 (D1)
-
Reserved
-
-
-
SR2 (D2)
-
Reserved
-
-
-
SR3 (D3)
-
Reserved
-
-
-
SR4 (D4)
FMR06
Program status
Completed as
expected
Completed in error
0
SR5 (D5)
FMR07
Erase status
Completed as
expected
Completed in error
0
SR6 (D6)
-
Reserved
-
-
-
SR7 (D7)
FMR00
Sequencer status
Busy
Ready
1
D0 to D7: The data buses read when the read status register command is executed.
Содержание M16C Series
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