R01UH0092EJ0110 Rev.1.10
Page 430 of 807
Jul 31, 2012
M16C/64C Group
22. Remote Control Signal Receiver
Figure 22.6
Operations in Pattern Match Mode
a
Overflow at the
setting value
Count stopped
Count started
Count started
PMCi internal input signal
Bits TYP1 to TYP0 are 00b (period measurement)
b
Counter operation
PMCiTIM register
a
b
Count stops
Count starts
c
Counter
operation
PMCiTIM register
c
a
b
Count stopped
Count started
e
Counter
operation
PMCiTIM register
c
d
e
c
d
i = 0, 1
TYP1 to TYP0: Bits in the PMCiCON1 register
Overflow at the setting value: Counter value is larger than values of registers PMCiHDPMAX, PMCiD0PMAX, and
PMCiD1MAX.
b
a
b
b
Overflow at the
setting value
Overflow at the
setting value
Bits TYP1 to TYP0 are 01b (high level width measurement)
a
Bits TYP1 to TYP0 are 10b (pulse width measurement)
a
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