Quectel UG89, Проектирование аппаратного обеспечения

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UMTS/HSPA+ Module Series
UG89 Hardware Design
UG89_Hardware_Design 15 / 73
3.2. Pin Assignment
The following figure shows the pin assignment of UG89 module.
55
56
57
58
59
60
61
65
66
67
68
69
70
71
72
1
8
1
7
1
6
1
5
1
4
1
3
5 4 3 2 1
64
63
62
6
POWER USB UART
(U)SIM
1
2
7 8 9
1
0
1
1
93
94
95
96
117
118
119
120
97
73
86 85
88
87 90
89
92 91
110 109 112
111
114
113 115
104 105 102 103
100
101 99
80 81
78
79 76 77 75
108
107
106
84
83
82
36
35
34
33
32
31
30
27
28
29
26
25
24
23
22
21
20
19
5
0
5
1
5
2
5
3
5
4
4
9
3
7
3
8
3
9
4
0
4
1
4
2
4
3
4
8
4
7
4
6
4
5
4
4
PWM1 / USB_BOOT
1)
GND
GND
GND
GND
GND
RESERVED
RESERVED
RESERVED
RESERVED
GPIO5
GND
ANT_MAIN
GND
COUNTER
VBAT
GND
GND
GPIO4
DBG_RTS
DBG_CTS
DBG_TXD
DBG_RXD
PCM_DOUT
VCORE
USIM_CLK
USIM_VDD
GPIO2
GPIO1
PCM_CLK
I2C_SDA
I2C_SCL
GPIO3
RESET_N
PCM_DIN
PCM_SYNC
R
E
S
E
R
V
E
D
G
N
D
V
B
A
T
A
D
C
P
O
N
U
A
R
T
1
_
R
I
U
A
R
T
1
_
R
T
S
R
E
S
E
R
V
E
D
U
S
IM
_
R
S
T
U
S
IM
_
D
E
T
U
S
IM
_
D
A
T
A
U
A
R
T
1
_
T
X
D
V
D
D
_
E
X
T
G
N
D
R
E
S
E
R
V
E
D
G
N
D
U
A
R
T
1
_
C
T
S
U
A
R
T
1
_
R
X
D
P
W
M
2
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
U
S
B
_
D
M
U
S
B
_
D
P
R
E
S
E
R
V
E
D
G
N
D
R
E
S
E
R
V
E
D
G
N
D
R
E
S
E
R
V
E
D
G
N
D
U
A
R
T
1
_
D
C
D
U
A
R
T
1
_
D
T
R
U
S
B
_
V
B
U
S
S
T
A
T
U
S
G
N
D
U
A
R
T
1
_
D
S
R
R
E
S
E
R
V
E
D
74
98
P
W
R
K
E
Y
116
OTHERS GND RESERVED PCM
ANT
Figure 2: Pin Assignment (Bottom View)
1. If PCM_CLK, and I2C_SCL are not used, it is recommended to mount a 33pF capacitor close to
each of the three pins to prevent interference from affecting RF
’s performance. Other unused pins
and RESERVED pins should be kept open, and all GND pins should be connected to the ground.
1)
means that these pins cannot be pulled up before startup.
NOTES