LTE-A Module Series
EM160R-GL_Hardware_Design 29 / 73
3.5. RESET#
RESET# is an active low signal (1.8 V logic level). When this pin is asserted, the module will immediately
enter reset condition.
Please note that triggering the RESET# signal will lead to loss of all data in the module and removal of
system drivers. It will also disconnect the modem from the network.
Table 10: Pin Definition of RESET#
An open collector/drain driver or button can be used to control the RESET# pin.
Host
Module
RESET#
GPIO
67
Reset pulse
T3
R5
100K
Q2
NMOS
PMIC
1.8 V
40K
R1
1K
Figure 10: Reference Design of RESET# with NMOS Driver Circuit
The reset scenario is illustrated in the following figure.
Pin Name
Pin No.
Description
Comment
RESET#
67
Reset the module
Active low.
A test point is recommended to be
reserved if unused.
