Qorivva MPC5 Series, Руководство пользователя

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Qorivva MPC5xxx/SPC5xx Debugger and NEXUS Trace 45
©1989-2021 Lauterbach GmbH
On MPC5777C, RESET_B is the processor’s only reset input and has the effect of a destructive reset. In the
context of this chapter, assume RESET_B==PORST. MPC5777C can only use method 2 and, if the
processor's RSTOUT is connected to the debugger's RSTOUT, method 4.
In the case the debugger’s reset output is connected to PORST, several workarounds are available to gain
access to the processor:
1. If the processor includes the Debug and Calibration Interface (DCI) , perform SYStem.Up using a
functional reset via JTAG instead of asserting the reset output. This method can not be used together with
SYStem.Mode.StandBy . It is not possible to halt the core immediately after a power-on reset.
2. Use workaround to unlock and halt the core after reset release with fixed delay. The delay time set with
SYStem.Option WaitReset is critical. If the time is too short, the debugger sends the debug request before
the processor is unlocked and SYStem.Up will fail. If the time is too long, the processor will execute many
instructions before the debug request is sent. With a little fine-tuning it is usually possible to halt the core
within <100 instructions, i.e. before it leaves the BAF code. This method supports debugging/tracing through
power cycles.
3. Use workaround to unlock and halt the core after reset is released. It is required that the reset is visible to
the debugger on the debug/trace connector’s RESET pin (bidirectional reset signal). If the processor has
separate RESET in and out pins, use method 4. Usually it is possible to halt the core within a few 100
instructions, i.e. before it leaves the BAF code. This method supports debugging/tracing through power
cycles.
SYStem.CPU <cpu>
CORE.ASSIGN <cores>
SYStem.Option KEYCODE <password>
SYStem.Option ResetMode FUNCtional
SYStem.Up
SYStem.CPU <cpu>
CORE.ASSIGN <cores>
SYStem.Option KEYCODE <password>
SYStem.Option ResBreak OFF
SYStem.Option WaitReset <delay> default
SYStem.Option ResetMode PIN
SYStem.Up
SYStem.CPU <cpu>
CORE.ASSIGN <cores>
SYStem.Option KEYCODE <password>
SYStem.Option ResBreak OFF
SYStem.Option WaitReset 0s RESET
SYStem.Option ResetMode PIN
SYStem.Up