PT CPC5565, Руководство пользователя, Страница: 30 / 118

Chapter 2: Introduction
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Reset
The CPC5565 provides the following reset types:
• Push-button reset
• IPMC generated reset (Payload Reset)
• Watchdog timer reset
See Chapter 6, “Reset” for more information.
Two-Stage Watchdog Timer
The watchdog timer optionally monitors system operation and is programmable for one of
many different timeout periods (from 1µs to 1050s). It is a two-stage watchdog, meaning that it
can be enabled to produce a SERIRQ, NMI or SMI interrupt during the first stage followed by a
system reset for the second stage. Failure to strobe the watchdog timer within the programmed
time period may result in an NMI/SMI/SERIRQ, a system reset, or both. A register bit is set if
the watchdog timer caused the reset event.
The CPC5565's two-stage watchdog timer resides in the Intel 3100 chipset. The topic “Chipset”
on page 115 , provides a link to the datasheet for this device.
LED Indicators
The LEDs located on the front panel are defined below. See Figure 2-1, “CPC5565 Front
Panel,” on page 19 for LED locations.
User LED
Bicolor LED controlled by system register settings See the topic “Programming the LEDS” on
page 59 , for more information.
• Green = user defined
• Yellow = user defined
• Off = user defined
Front Panel Ethernet (RJ-45 Connector)
Each Ethernet connector on the front panel includes two LEDs:
• Ethernet Speed (Top)
– Green = 100 Mb/s
– Orange = 1000 Mb/s
– Off = 10 Mb/s
• Ethernet Link (bottom)
– Yellow = Link
– Off = No Link