PT CPC5565 Скачать руководство пользователя страница 24 | Manualshive

Страница: 24 / 118

PT CPC5565 Скачать руководство пользователя страница 24

Chapter 2: Introduction

24

•

PCI-Express interface features:

– x8 interface capable of bifurcation into two logically independent x4 interfaces with full

specification compliance at half the bandwidth capability

– Low latency, high bandwidth

– 32-bit CRC protection on all packets

– CRC errors are recoverable by retransmission

– Supports 64-bit addressing

– Advance error detection and error transmission on destination bus

– Integrated bit-error generation and monitor function

– PCI-E v1.0 and v1.0a compliant

– Statistics for SNMP MIB II, Ethernet like MIB, and Ethernet MIB (802.3z, Clause 30)

CompactPCI Bus Interface

The CPC5565 does not support a CompactPCI interface at backplane connector J4. The
supported connectors provide access to the following signals:

J1/J2: 3.3V/5V PCI 32 bit 33/66 MHz System Master (driving clocks)

J3: Two PICMIG 2.16-compliant Ethernet ports

J5: Three fixed SATA interfaces (one additional as a load option). JTAG port for test/debug/
manufacturing purposes

See

“Backplane Connectors” on page 87

for location and pinout information for these

connectors.

The CPC5565 is compliant with:

•

PICMG 2.0 CompactPCI Core Specification

•

PICMG 2.1 CompactPCI Hot Swap Specification

•

PICMG 2.16 R1 CompactPCI packet-switched backplane (Ethernet) Specification

•

PICMG 2.9 R1.0 CompactPCI System Management Specification

“PICMG Specifications” on page 116

contains links to the PICMG Web site, where these

CompactPCI Specifications may be obtained.

The CPC5565 supports hosting hot-swap peripherals in a powered system. The CPC5565 can
also function in a standard (non-hot swap) CompactPCI system.

Intelligent Platform Management Controller

The CPC5565 includes an Intelligent Platform Management Controller (IPMC or BMC) based
on the Atmel ATMEGA128L-8MU, which interfaces to the LPC bus, provides System
Management Bus (SMB) interfaces, and is IPMI compliant. The IPMC subsystem monitors,
controls, and performs remote diagnostics for many on- and off-board functions through IPMI
(Intelligent Platform Management Interface) compliant system management bus interfaces.

«
...
22
23
24
25
26
...
»

Содержание CPC5565

Страница 1: ...CPC5565 Intel Core 2 Duo Processor Single Board Computer User s Guide www pt com 205 Indigo Creek Drive Rochester NY 14626 Phone 1 585 256 0200 support pt com R TM...

Страница 2: ...cal shock and danger to personal health follow the instructions Date Explanation of changes December 2 2009 Initial Production Release December 10 2009 Updated default setting in the topic SW2 4 Conso...

Страница 3: ...r clothing or work environment can damage the electronic equipment It is recommended that anti static ground straps and anti static mats are used when installing the board in a system to help prevent...

Страница 4: ...4...

Страница 5: ...et 23 CompactPCI Bus Interface 24 Intelligent Platform Management Controller 24 Memory 25 Universal Serial Bus USB 25 AMD ATI Radeon E2400 Video Processor 25 Video Features 26 SMARTSHADER 4 0 Advanced...

Страница 6: ...d Environmental Requirements 34 Memory Configuration 34 I O Configuration 36 Connectivity 37 Switches 37 Switch Pack 1 SW1 37 SW1 1 PCIXCAP Override on Local PCI Bus 37 SW1 2 COM Port Override 38 SW1...

Страница 7: ...ault Setup 53 Behavior of the BIOS if a Corrupted CMOS Checksum is Detected 53 Installing a PMC Device 54 Installing the Operating System 57 USB CD DVD 57 PXE 58 Operating Systems Supported 58 Program...

Страница 8: ...ommunication Timeout Command 74 Graceful Payload Reset 74 Payload Diagnostic Interrupt 75 Payload Shutdown Timeout 75 Get Payload Shutdown Timeout Command 75 Set Payload Shutdown Timeout Command 76 Ge...

Страница 9: ...DDR2 SDRAM Connectors P1 P2 98 Hot Swap Ejector Switch Connector P3 98 SATA Hard Disk Connector Optional 98 Cables 99 Serial Cables 99 Chapter 6 Reset 101 Reset Types and Sources 101 General Reset Sou...

Страница 10: ...ssions Test Regulations 111 EN 50081 1 Emissions 111 EN 55024 Immunity 112 Regulatory Information 112 FCC USA 112 Industry Canada Canada 112 Product Safety Information 113 Safety Precautions 113 Compl...

Страница 11: ...s Parameter Bit Fields 72 Table 4 9 IPMC Debug Levels 73 Table 5 1 Connector Assignments 85 Table 5 2 J1 CompactPCI Bus Connector Pinout 87 Table 5 3 J2 V I O Connector Pinout 88 Table 5 4 J3 Rear Pan...

Страница 12: ...ables 12 Table 5 13 PTMC Connector Pin Map J14 97 Table 5 14 P3 Hot Swap Ejector Switch Connector Pinout 98 Table 5 15 Management Cable Pinout 99 Table 7 1 Power Consumption with 2 2 GHz Processor 104...

Страница 13: ...rt Trunking Configuration Screen 46 Figure 3 9 MAC Address Handling Configuration Screen 47 Figure 3 10 Inter Switch Link Connection 48 Figure 3 11 Separate Switching Domains 49 Figure 3 12 ISL Segreg...

Страница 14: ...Figures 14 Figure 7 1 Battery Socket Locations 106 Figure 7 2 CPC5565 Board Dimensions 107...

Страница 15: ...d internal connectors It also includes a description of the serial cable recommended for use with the front panel RJ11 serial connector Chapter 6 Reset on page 101 describes the CPC5565 reset types wi...

Страница 16: ...r 2 TELEPHONE Contact us via telephone at the number listed below and request Technical Support Our offices are open Monday to Friday 8 00 a m to 8 00 p m Eastern Time If you are located outside North...

Страница 17: ...repair or replace the product provided proof of purchase and written notice of nonconformance are received by Performance Technologies within 12 months of shipment or in the case of software and inte...

Страница 18: ...WHETHER EXPRESS IMPLIED OR STATUTORY INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS IN NO EVENT SHALL PERFORMANCE TECHNOLOGIES BE LIABLE FOR ANY INCIDENTAL OR CONSEQUENTIAL DAMAGES DUE TO...

Страница 19: ...dual core 2 2 GHz processor designed for high performance embedded applications The board incorporates the Intel 3100 integrated northbridge southbridge chipset supporting an 800 MHz front side bus in...

Страница 20: ...Transfer Cache Architecture 800 MHz Source Synchronous front side bus Intel Virtualization Technology Execute Disable Bit support for enhanced security System management bus Card edge interface contai...

Страница 21: ...ory Supports Windows XP Linux and Solaris 9 10 64 bit operating systems IPMI interface on the backplane Standard AT peripherals include Real time clock CMOS RAM 16C550 RS 232 serial port USB 2 0 port...

Страница 22: ...al Time Clock CMOS RAM and Battery on page 29 Reset on page 30 Two Stage Watchdog Timer on page 30 LED Indicators on page 30 Rear Panel I O on page 31 Figure 2 2 CPC5565 Functional Block Diagram Rear...

Страница 23: ...the Intel 3100 integrated chipset The Intel 3100 chipset integrates the traditional north south bridge functions as well as some SuperI O and peripheral IC features into a single IC The Intel 3100 fe...

Страница 24: ...AG port for test debug manufacturing purposes See Backplane Connectors on page 87 for location and pinout information for these connectors The CPC5565 is compliant with PICMG 2 0 CompactPCI Core Speci...

Страница 25: ...5565 includes two 200 pin Small Outline Registered Dual In line Memory Module SO RDIMM socket that can be populated with up to 8 GB DDR2 400 registered SDRAM The BIOS automatically determines the SDRA...

Страница 26: ...on set Offers full support for this feature in OpenGL 2 0 applications SMOOTHVISION 2 0 Flexible Anti Aliasing and Anisotropic Filtering 2x 4x 8x full scene anti aliasing modes Adaptive algorithm with...

Страница 27: ...the topic BIOS Configuration Overview on page 40 for more information about BIOS setup The front panel RJ 45 serial port supports flow control The rear panel serial port connection at J5 has the signa...

Страница 28: ...User I O Connector on page 90 Rear Transition Module Optional The RTM4811 an advanced rear transition module offers support for a SATA 2 5 in hard drive disk an analog VGA video interface and USB The...

Страница 29: ...clock or the CompactPCI bus The CPC5565 can optionally be reset by the System Master when in a peripheral slot See the topic SW3 3 Force Drone Mode on page 39 for more information Real Time Clock CMOS...

Страница 30: ...may result in an NMI SMI SERIRQ a system reset or both A register bit is set if the watchdog timer caused the reset event The CPC5565 s two stage watchdog timer resides in the Intel 3100 chipset The t...

Страница 31: ...ns the following I O signals through CompactPCI connector J5 to an optional Rear Transition Module COM port Video Power and Ground USB SATA SMBus RPIO Present Eject JTAG In addition the CPC5565 transi...

Страница 32: ...ttp www sun com bigadmin hcl overview html Red Hat Enterprise Linux AS 4 Update 3 32 and 64 bit versions has been installed successfully pending Nexusware Core has been installed and successfully run...

Страница 33: ...pter include Unpacking on page 34 Electrical and Environmental Requirements on page 34 Memory Configuration on page 34 I O Configuration on page 36 Connectivity on page 37 Switches on page 37 BIOS Con...

Страница 34: ...e of supplying adequate airflow The maximum power dissipation of the processor is 35 W External airflow must be provided at all times See Chapter 7 Specifications and Chapter 8 Thermal Considerations...

Страница 35: ...the PCI address space base address and system memory continues above 16 GB up to the top of memory High PCI Memory Range System BIOS FEC03000 FEDFFFFFh FEE00000 FEE003FFh FEC81000 FEC81FFFh FEC80000...

Страница 36: ...40h Chipset SMB Base 4D0 4D1h Interrupt Controller 460h Chipset TCO Base 400h Chipset Power Management Base 3F6h SATA 376h SATA 1F0 1F7h SATA 170 177h SATA E1 E8h CPC5565 System Registers C0 DFh On bo...

Страница 37: ...three switch packs and a front panel reset switch as shown in Figure 3 3 Switch Locations Figure 3 3 Switch Locations Switch Pack 1 SW1 SW1 is a four position single pole DIP switch pack See Figure 3...

Страница 38: ...be reset based on PCI reset J1 if it is operating in a non system master slot drone mode Switch Pack 2 SW2 SW2 is a four position single pole DIP switch pack See Figure 3 3 Switch Locations for the s...

Страница 39: ...d when the CPC5565 is inserted or removed hot swapped from a chassis that is powered on Before removing a board from a system that is powered on open the ejector handles just enough to disengage them...

Страница 40: ...sensitive help is displayed in the right portion of the screen for each parameter A legend of keys is listed at the bottom of the setup screen Use the left and right arrow keys to select a category f...

Страница 41: ...tus of that channel Two channels to midplane connector J3 2 16 A and 2 16 B BIOS setup options Two channels to optional on board PMC site J11 J14 PMC A and PMC B BIOS setup options This site provides...

Страница 42: ...nfigured in the BIOS setup utility Selecting the VLAN Configuration option on the Switch Configuration submenu brings up the screen shown in Figure 3 6 VLAN Configuration Screen on page 43 where the o...

Страница 43: ...J14 ENET A to the host CPU via the 82571 dual NIC Table 3 1 Default Ethernet Routing Route From Route To ENETA ENETB PMC A PMC B 2 16 A 2 16 B Front Panel A Front Panel B ENETA X X X ENETB X X X PMC...

Страница 44: ...stripped prior to forwarding the frame Port VLAN Mode The second VLAN option is Port Mode This mode is selected by setting 802 1Q Mode to Disabled Port mode allows tagged and untagged packets to be s...

Страница 45: ...ption can be configured Due to frame buffer memory limitations PT recommends that no more than five ports be enabled to pass jumbo frames at any one time The default configuration enables jumbo frames...

Страница 46: ...of the same speed By performing a dynamic hashing algorithm on the SA and or DA MAC addresses each packet destined for the trunk group is forwarded to one of the valid ports within the trunk group Thi...

Страница 47: ...forwarding causes the embedded switch to discard packets with DA MAC addresses in the range of 01 80 C2 00 00 02 through 01 80 C2 00 00 0F These addresses are typically used for protocols such as Link...

Страница 48: ...e PDUs from flowing between these ports but the separate VLANs prevent broadcast storms Avoiding Loops The primary methods to avoid network loops are Create separate switching domains through wiring a...

Страница 49: ...driver and monitor the path to each router with ARPs and plumb a Virtual IP Address onto the active interface Figure 3 11 Separate Switching Domains A similar H A configuration can be achieved with t...

Страница 50: ...c switches The packet is also sent back to the CPC5565 into VLAN 2 from Fabric B The embedded switch sees the Source MAC address of eth0 and learns that MAC on the Fabric B port If Host A sends a pack...

Страница 51: ...gured for Port Mode VLANs In order to support redundancy redundant paths are provided via the two fabric switches and Spanning Tree is utilized to create a loop free topology In this example two exter...

Страница 52: ...C5565 in an embedded application without video support Console redirection is configurable from the CPC5565 s BIOS setup utility Remote Access Configuration setup menu under the Advanced tab on the ma...

Страница 53: ...tom Defaults used to restore your new custom settings Clear Custom Defaults used to clear your new custom default so the original factory defaults are used whenever CMOS is rewritten Behavior of the B...

Страница 54: ...mmend using anti static grounding straps and anti static mats to help prevent damage due to electrostatic discharge when installing the PMC device Note The PMC card must have transformers on it to pro...

Страница 55: ...ole in the PMC 7 Align the PMC device s PMC connectors with the CPC5565 PTMC connectors and press together until the connectors are completely engaged 8 After the PMC connectors are properly seated ch...

Страница 56: ...Chapter 3 Getting Started 56 Figure 3 16 PMC Card Installation Voltage Key Post...

Страница 57: ...cted being sure to select appropriate device types if prompted Refer to the appropriate hardware manuals for specific device types and compatibility modes of PT products A link to PT manuals is availa...

Страница 58: ...aded This speeds the BIOS boot sequence The PXE Option ROM can be disabled in the PCI PnP menu Creating a bootable PXE OS or installing an OS over PXE is beyond the scope of this manual Operating Syst...

Страница 59: ...the desired values then write the double word back out to IO address 50Ch preserving all other bits in the double word Installing the Display Drivers The AMD ATI Radeon E2400 video processor on the CP...

Страница 60: ...e Installing the Catalyst Control Center and Microsoft NET Framework 2 0 allows optimal configuration of the CPC5565 under Windows XP operating systems 5 Create a separate directory on the system hard...

Страница 61: ...erial Interface Subsystem on page 68 Firmware Upgrade Process on page 76 IPMC Functions Some of the functions available on the module through the IPMI interface include Monitoring of the CPU and board...

Страница 62: ...1h Cold Reset 17 2 App 02h Warm Reset 17 3 App 03h Broadcast Get Device ID a 17 9 App 01h Messaging Commands Set BMC Global Enables 18 1 App 2Eh Get BMC Global Enables 18 2 App 2Fh Clear Message Flags...

Страница 63: ...See Device ID below for the device ID data retrieved in response to a Broadcast Get Device ID command for this module b See Device Locator Record below for the IPMB management controller device locato...

Страница 64: ...Device Locator Record Parameter Value Power State Notification ACPI System Power State notification required NO ACPI Device Power State notification required NO Global Initialization Controller logs...

Страница 65: ...s Device SDRs YES Device Revision Number 0x00 Device Available YES Firmware Revision Changes with each release IPMI Version 1 5 Additional Device Support Chassis Device NO Bridge NO IPMB Event Generat...

Страница 66: ...V 1 12V N A 6 1 8V N A 1 68V 1 70V 1 90V 1 92V N A 7 1 2V N A 1 12V 1 14V 1 26V 1 28V N A 8 5V IPMB N A 4 5V 4 54V 5 47V 5 49V N A 9 VIO N A 2 97V 2 99V 5 47V 5 49V N A 10 0 9V N A 0 81V 0 855V 0 945V...

Страница 67: ...eventive action should be taken For example if several boards in a shelf report upper non critical temperature events the shelf manager might decide to increase fan speed Critical events indicate that...

Страница 68: ...t bracket plus newline characters serve as START and STOP delimiters for a message The IPMC does not support multi line IPMI messages Raw IPMI Messages The SIPL supports raw IPMI messages that are ent...

Страница 69: ...me manner as for raw IPMI messages see Raw IPMI Messages on page 68 Figure 4 1 PPS Extension Command Request shows an example of a PPS extension command request Figure 4 1 PPS Extension Command Reques...

Страница 70: ...mmands Set Serial Interface Properties 0x02 Serial debug and payload interfaces Set the properties of a serial interface Get Debug Level 0x03 Serial debug interface Get debug verbosity level Debug Ver...

Страница 71: ...40 00 The IPMC responds to the Get Status command with the following reply BC xx 00 00 0A 40 00 byte1 byte2 byte3 byte4 Table 4 6 IPMC Status Bits Bit Name Description Byte 1 0 LSB Control If set to...

Страница 72: ...to the Get Serial Interface Properties command with the following reply BC xx 01 00 0A 40 00 interface properties The interface properties parameter has the bit fields shown in Table 4 8 The interfac...

Страница 73: ...To change the current debug level the Set Debug Level command must be used This command has the following synopsis B8 xx 04 0A 40 00 debug level Table 4 9 IPMC Debug Levels Bit Name Description 0 LSB...

Страница 74: ...0 1 to 25 5 seconds The default value of the payload communication timeout is specified by the CFG_APP_SIPL_PAYLOAD_TIMEOUT Configuration Parameter Set Payload Communication Timeout Command To change...

Страница 75: ...yload shutdown is complete The IPMC disables payload power upon receiving the Graceful Reset command or detecting that the payload is in ACPI sleep state S5 To avoid deadlocks that may occur if the pa...

Страница 76: ...is online and operating normally Upgrades of the firmware component are reliable A failure in the download error or interruption does not disturb the IPMC s ability to continue using the old firmware...

Страница 77: ...be deferred until a later time The IPMC firmware supports two upgradeable components the firmware itself and the boot loader In case of an unsuccessful firmware upgrade it is possible to roll back to...

Страница 78: ...upgrade stage Upgrading AVR AMCm F W with Version Major 1 Minor 70 Aux 000 000 000 000 Writing firmware 100 completed Performing activation stage Firmware upgrade procedure successful IPMI Communicati...

Страница 79: ...ss method can be used from any Linux or Windows host that has an Ethernet connection to the Shelf Manager of the shelf in which the IPMC is installed In this access method the ipmitool utility uses an...

Страница 80: ...tyS0 For the Cygwin flavor of the ipmitool utility Windows serial device names are translated as follows the COM1 device name is mapped to dev ttyS0 COM2 is mapped to dev ttyS1 and so on The supported...

Страница 81: ...version 0 Component 0 presence y Component 1 presence y Component 2 presence n Component 3 presence n Component 4 presence n Component 5 presence n Component 6 presence n Component 7 presence n Upgra...

Страница 82: ...PM 1 Upgrade Agent 1 0 GENERAL PROPERTIES Payload cold reset req y Def activation supported y Comparison supported n Preparation supported y Rollback supported y upgrade Upgrade the firmware with the...

Страница 83: ...grade Agent 1 0 rollback Perform a manual rollback on the IPM controller This command can be used to roll back from the newly uploaded firmware to the old one ipmitool hpm rollback Example ipmitool I...

Страница 84: ...Chapter 4 System Monitoring and Alarms 84...

Страница 85: ...0 pin 2 mm x 2 mm female J3 Rear Panel Gigabit Ethernet Connector Backplane 95 pin 2 mm x 2 mm female J5 Rear Panel User I O Connector Backplane 110 pin 2 mm x 2 mm female DVI I Connector J6 Front Pan...

Страница 86: ...or Switch Connector P3 P1 J2 J3 J5 J11 J12 J13 J14 SATA Hard Disk Connector Optional USB Connectors J10 J15 Ethernet Connectors J8 and J9 RS 232 RJ 45 Console Port J7 DVI I Connector J6 CompactPCI Bac...

Страница 87: ...EQ64 ENUM 3 3V 5V G N D 24 AD 1 5V V I O AD 0 ACK64 23 3 3V AD 4 AD 3 5V AD 2 22 AD 7 GND 3 3V AD 6 AD 5 21 3 3V AD 9 AD 8 M66EN C BE 0 20 AD 12 GND V I O AD 11 AD 10 19 3 3V AD 15 AD 14 GND AD 13 18...

Страница 88: ...6 DEG GND BRSVP2E16 15 BRSVP2A15 GND FAL REQ5 GNT5 14 1V Pre Charged 1V Pre Charged 1V Pre Charged GND 1V Pre Charged 13 1V Pre Charged GND V I O 1V Pre Charged 1V Pre Charged 12 1V Pre Charged 1V Pre...

Страница 89: ...t Pin Z A B C D E F 19 G N D RESV RESV RESV RESV RESV G N D 18 LPA_DA LPA_DA GND LPA_DC LPA_DC 17 LPA_DB LPA_DB GND LPA_DD LPA_DD 16 LPB_DA LPB_DA GND LPB_DC LPB_DC 15 LPB_DB LPB_DB GND LPB_DD LPB_DD...

Страница 90: ...O Connector Pinout Pin A B C D E F 22 RESV RESV V5V USB2 USB2 G N D 21 GND GND V5V GND GND 20 SATA_TX4_P SATA_TX4_N V5V RESV J5_SDA 19 SATA_RX4_P SATA_RX4_N V5V RESV J5_SCL 18 SATA_TX3_P SATA_TX3_N G...

Страница 91: ...HIELD 3 TMDS_DATA4 4 TMDS_DATA4 5 DDC_CLK_SCL 6 DDC_DATA_SDA 7 ANALOG_VERT_SYNC 8 TMDS_DATA1 9 TMDS_DATA1 10 TMDS_DATA1 3SHIELD 11 TMDS_DATA3 12 TMDS_DATA3 13 5V 14 GND 15 HOT_PLUG_DETECT 16 TMDS_DATA...

Страница 92: ...nector identification Ethernet Connectors J8 and J9 Two RJ 45 connectors on the CPC5565 s front panel provide two 1000 Mbps 1000Base T Ethernet channels Two bicolor LEDs are located inside each RJ 45...

Страница 93: ...connectors on the CPC5565 PCB PTMC Connectors J11 J12 J13 and J14 Optional on page 93 DDR2 SDRAM Connectors P1 P2 on page 98 Hot Swap Ejector Switch Connector P3 on page 98 SATA Hard Disk Connector O...

Страница 94: ...27 AD22 28 AD21 29 AD19 30 5V 31 3 3V VIO 32 AD17 33 FRAME_L 34 GND 35 GND 36 IRDY_L 37 DEVSEL_L 38 5V 39 PCIXCAP 40 PLOCK_L 41 SCL 42 SDA 43 PAR_L 44 GND 45 3 3V VIO 46 AD15 47 AD12 48 AD11 49 AD9 50...

Страница 95: ...16 BMODE4_L 17 REQ_L 18 GND 19 AD30 20 AD29 21 GND 22 AD26 23 AD24 24 GND 25 IDSEL 26 AD23 27 3 3V 28 AD20 29 AD18 30 GND 31 AD16 32 CBE2 33 GND 34 N C 35 TRDY_L 36 IRDY_L 37 GND 38 STOP_L 39 PERR_L 4...

Страница 96: ...16 BMODE4_L 17 AD59 18 GND 19 AD57 20 GND 21 PTID0 22 AD26 23 AD55 24 GND 25 AD53 26 GND 27 GND 28 AD20 29 AD51 30 GND 31 AD49 32 GND 33 GND 34 N C 35 AD47 36 IRDY_L 37 AD45 38 GND 39 PTENB_L 40 AD44...

Страница 97: ...A_P 14 TP3C_P 15 TP3A_N 16 TP3C_N 17 GND 18 GND 19 TP3B_P 20 TP3D_P 21 TP3B_N 22 TP3D_N 23 GND 24 GND 25 N C 26 N C 27 N C 28 N C 29 N C 30 N C 31 N C 32 N C 33 N C 34 N C 35 N C 36 N C 37 N C 38 N C...

Страница 98: ...switch to the board s lower ejector mechanism This switch is tied to logic on the CPC5565 to sense a board extraction or insertion See Table 5 14 P3 Hot Swap Ejector Switch Connector Pinout for pin de...

Страница 99: ...nd figure show the required connections This cable is available from PT as part number ACC7340 120 J5 Rear Panel User I O Connector may also be used to access the Command Line Interface If an RTM blad...

Страница 100: ...Chapter 5 Connectors 100...

Страница 101: ...All on board devices are reset NMI Non Maskable Interrupt Though not a reset in the strict sense an NMI can have the same effect as other resets The CPC5565 can be reset by the J1 PCI reset signal th...

Страница 102: ...Chapter 6 Reset 102...

Страница 103: ...elow are stress ratings only Do not operate the CPC5565 at these maximums See the topic DC Operating Characteristics below for operating conditions Operating Temperature The operating temperature rang...

Страница 104: ...5 with a 2 2 GHz 35 W Core 2 Duo processor 2GB DDR2 400 PC2 3200 SDRAM with a 120 GB SATA hard drive and no PMC installed Table 7 1 Power Consumption with 2 2 GHz Processor Notes 5 V and 3 3 V maximum...

Страница 105: ...m is required as part of a regular maintenance cycle for their board There are two options in the event the battery must be replaced Return the board to PT to have the battery replaced Contact PT to o...

Страница 106: ...ons 106 Figure 7 1 Battery Socket Locations CPC5565 Reliability Board MTBF TBD hours MTBF is calculated per Bellcore specification SR TSY 332 using method I part count at 50 stress 30 degrees C MTTR 3...

Страница 107: ...below Board Length 160 mm 6 24 in Board Width 233 35 mm 9 1 in Board Height 13 716 mm 0 540 in Board Weight 0 72 kg 1 59 lbs 8 GB SDRAM loaded no hard drive no PMC Figure 7 2 CPC5565 Board Dimensions...

Страница 108: ...Chapter 7 Specifications 108...

Страница 109: ...rature PT strongly recommends that you verify the operating temperature of the processor core in your final system configuration The Core 2 Duo T7500 processor incorporates an on die thermal diode tha...

Страница 110: ...Chapter 8 Thermal Considerations 110...

Страница 111: ...of Directive 89 336 EEC for electromagnetic compatibility and the Low Voltage Directive 73 23 EEC for product safety Compliance will be demonstrated to the following specifications as listed in the Of...

Страница 112: ...a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Note This device complies with Part 15 of the FCC Rul...

Страница 113: ...rom the chassis soon after shutdown Wait a few minutes to allow the heat sink to cool down Caution To Avoid Electric Overload To avoid electrical hazards heat shock and or fire hazard do not make conn...

Страница 114: ...power connections before servicing Compliance with RoHS and WEEE Directives In February 2003 the European Union issued Directive 2002 95 EC regarding the Restriction of the use of certain Hazardous Su...

Страница 115: ...via the Broadcom BCM5389 Refer to the following Web page for more information http www broadcom com products Small Medium Business Gigabit Ethernet Switching Products BCM5389 Onboard Ethernet to the h...

Страница 116: ...developer I O Controller The following CPC5565 functions reside in the Intel 3100 integrated chipset Serial port controller COM1 Real time clock and CMOS memory Intelligent power management Contact In...

Страница 117: ...Disable Bit and Enterprise Security http www intel com technology xdbit AP 485 Intel Processor Identification and CPUID Instruction http www intel com Assets PDF appnote 241618 pdf User Documentation...

Страница 118: ...Chapter 10 Data Sheet Reference 118...

Отзывы:

Нет отзывов