Prism
Operation Manual Issue 2.00
Page 6.6
Note: The 1.5kHz setting of the PLL has been revised from the 3kHz setting provided
in the revision B hardware to provide improved low-frequency coverage in the 'standard'
setting. This is possible because the intrinsic jitter of the PLL in the revision C hardware
is lower than for revision B, and the response flatter.
6.1.2.1.
Jitter measurement while the Signal Generator is on
When the Signal Generator is on, Jitter can still be measured if GEN2 mode is selected
and if the incoming carrier is phase-locked to the Generator (or vice-versa). If the
phase error between input and Generator exceeds 25%, as indicated by the 'BLOCK'
LED, the jitter reading is 'dashed out', just as if the test input were unlocked. This
normally makes it quite obvious if the input and Generator are unlocked. If the input
and Generator are unlocked but similar in frequency, readings may be unpredictable
as the DSA-1 tries to fix onto the 'moving target'.
When the Generator is on, the DSA-1 uses the Generator's Ref Sync as its own timing
reference, therefore it is not restricted in low-frequency jitter measurement by the
corner-frequency of the PLL. The low-frequency limit in this case is governed by the
jitter sampling period and is just under 50Hz. The corner-frequency indicator on the
DSA-1 is thus replaced with '<50*'.
6.1.3.
Data Jitter (menu 1.3.)
This selection measures interface timing jitter in a similar manner to that described in
section 6.1.2. The main difference is that a greater number of transitions are
processed, and these are deliberately selected to be those which are modulated by
data activity. The results are similarly displayed:
Data Jittr [P-P]
= 8.7ns fc=1k5
This measurement represents the total of source- and cable-related jitter, and so in
most situations is principally cable-related; it will increase markedly with increasing
cable length and capacitance. A cable which is poor in these respects causes
'intersymbol interference' (or 'pulse smearing'), wherein the timings of transitions in the
data are displaced from their ideal instants owing to the effects of preceding transitions
or gaps.
If timing for A/D or D/A conversions is derived from the received interface signal, as is
frequently the case, it is vital for the conversion equipment to have very good jitter
rejection, ideally down to sub-audible frequencies, if unacceptable conversion
degradation is not to result. Since very few items of conversion equipment currently
have this property, it is important to minimize interface jitter by all means possible.
Cabling is the single most important factor in this. Extreme intersymbol interference
