17
Firmware version 1.10 - Document version 1.06 - eng
LTDVE1CH-40F | INSTRUCTIONS MANUAL
Figure 4: diagram of internal logic network
The synchronization input is shown at the left (TR), while the light output (LD) and the
synchronization output (SH) are drawn at the right.
A description of each of the blocks is given in the next sections.
12.2. Input filter
The input filter is used to debounce and remove glitches from the incoming synchronization input.
The algorithm implemented in the filter processes the synchronization input with a finite state
machine. A change in the filter output is performed only when the input signal has remained constant
for a defined period of time, called filter time constant. Any pulses shorter than the filter time constant
are thus removed and not passed through.
The diagram in
Figure 5: operation of the input filter
shows the filter operation on a random input
signal.
Figure 5: operation of the input filter
As visible, the input signal is filtered by looking for pulses that hold the same state for a time of at
least
Tfilter
before the change in state is passed to the output. Please note there is a fixed input to
output propagation delay equal to this filter time constant.
The filter can be set as follows:
•
No filtering (pass through)
•
Filtering with a 10µs time constant
•
Filtering with a 20µs time constant
•
Filtering with a 50µs time constant
•
Filtering with a 100µs time constant
input
Tfilter
output
Tfilter
Tfilter
Tfilter
