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Firmware version 1.10 - Document version 1.06 - eng
LTDVE1CH-40F | INSTRUCTIONS MANUAL
14.2.1. Register DEVICE_TYPE
This register contains the device type. This information is encoded as a 16-bit unsigned number. For
the standard LTDVE1CH-40F the device type is 0x000D.
14.2.2. Register BOOT_VERSION
This register contains the bootloader firmware version for the microcontroller. This information is
encoded as a 16-bit unsigned number.
14.2.3. Register MCU_VERSION
This register contains the application firmware version for the microcontroller. This information is
encoded as a 16-bit unsigned number.
14.2.4. Register FPGA_VERSION
This register contains the FPGA firmware version. This information is encoded as a 16-bit unsigned
number.
14.2.5. Register BOARD_VERSION
This register contains the board version. This information is encoded as a 16-bit unsigned number.
14.2.6. Register OSC_PERIOD
Bits [9:0] of this register contain the period of the internal oscillator. The information is expressed in
ms. Allowed values are in the range from 10 (corresponding to 100 Hz) up to 1000 (corresponding
to 1 Hz). Default value is 200 (corresponding to 5 Hz). Avoid operation with non-allowed values.
Bit field [15:10] of this register is unused. When writing these bits, they must be set to zero.
14.2.7. Register FILTER_SEL0
Bit field [2:0] of this register selects the time constant for filtering the input signal TR.
Allowed values are in the range from 0 to 6 and are listed below. Avoid operation with non-listed
values.
•
When 0x0 filter is disabled (pass through) (default value)
•
When 0x1 filter is enabled with a 10 µs time constant
•
When 0x2 filter is enabled with a 20 µs time constant
•
When 0x3 filter is enabled with a 50 µs time constant
•
When 0x4 filter is enabled with a 100 µs time constant
•
When 0x5 filter is enabled with a 200 µs time constant
•
When 0x6 filter is enabled with a 500 µs time constant
Bit field [15:3] of this register is unused. When writing these bits, they must be set to zero.
14.2.8. Registers INPUT_SEL[0-1]
Each bit field [11:0] of these two registers is the selector of the relevant input multiplexer. Each input
multiplexer feeds a dedicated pulse generator.
•
INPUT_SEL0
: setting of input multiplexer 0
•
INPUT_SEL1
: setting of input multiplexer 1
