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Firmware version 1.10 - Document version 1.06 - eng
LTDVE1CH-40F | INSTRUCTIONS MANUAL
Allowed values are listed below. Avoid operation with non-listed values.
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When 0x0000 the input multiplexer is disabled (default value)
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When 0x0001 the filtered TR input is selected
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When 0x0100 the free running oscillator is selected
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When 0x0200 the software trigger SW1 is selected
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When 0x0400 the software trigger SW2 is selected
Bit fields [15:11] and [7:1] of these registers are unused. When writing these bits, they must be set
to zero.
14.2.9. Registers GEN_DELAY_BASE[0-1]
Each bit field [1:0] of these two registers holds the time base selector for the generation of the pulse
delay in the relevant pulse generator.
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GEN_DELAY_BASE0
: time base selector for generation of pulse delay in generator 1
•
GEN_DELAY_BASE1
: time base selector for generation of pulse delay in generator 2
Allowed values are in the range from 0 to 3 and are listed below. Avoid operation with non-listed
values.
•
When 0x0 a time base of 1 µs is selected (default value)
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When 0x1 a time base of 10 µs is selected
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When 0x2 a time base of 100 µs is selected
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When 0x3 a time base of 1000 µs is selected
Bit fields [15:2] of these registers are unused. When writing these bits, they must be set to zero.
14.2.10. Registers GEN_DELAY_COUNT[0-1]
Each bit field [9:0] of these two registers holds the actual count for the generation of the pulse delay
in the relevant pulse generator.
•
GEN_DELAY_COUNT0
: pulse delay setting for generator 1
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GEN_DELAY_COUNT1
: pulse delay setting for generator 2
Allowed values are in the range from 0 (default value) to 1023 (maximum value). Avoid operation
with non-allowed values.
According to the time base selected in register
GEN_DELAY_BASE
[x] and the count set in
GEN_DELAY_COUNT
[x], the pulse delay may be calculated using the following formula:
Delay[x] [µs] = value(GEN_DELAY_BASE[x]) * value(GEN_DELAY_COUNT[x])
The pulse delay may range from 0 µs to 1,023,000 µs with variable absolute resolution.
Bit fields [15:10] of these registers are unused. When writing these bits, they must be set to zero.
14.2.11. Registers GEN_WIDTH_BASE[0-1]
Each bit field [1:0] of these two registers holds the time base selector for the generation of the pulse
width in the relevant pulse generator.
•
GEN_WIDTH_BASE0
: time base selector for generation of pulse width in generator 1
•
GEN_WIDTH_BASE1
: time base selector for generation of pulse width in generator 2