AS-Interface Standard Modes
Section 4-4
33
4-4-3
I/O Data Bits
After the master has completed the initialisation, and has entered Normal
Operation, it will cyclically update each slave’s I/O data in the Input Data
Image and the Output Data Image.
The PLC CPU will access the master’s IDI and ODI during the PLC’s I/O
refresh, which takes place every PLC scan. The data in the IDI and ODI is
mapped to the I/O areas assigned to the CQM1-ARM21 as shown below.
Even if a slave has only outputs, its input data area will still be updated each
PLC cycle. The input data is copied straight from the slave reply. Check the
specifications of each slave to find out if any relevant information is returned.
The same is true for input-only slaves. Although in most cases the data sent
to input slaves will be irrelevant, slaves may interpret the data bits sent to it to
perform specific functions.
Inputs
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
IR bits
IR n
Slave 3
Slave 2
Slave 1
Status Bits
Inputs from slaves 1-3
IR n+1
Slave 7
Slave 6
Slave 5
Slave 4
Inputs from slaves 4-7
IR n+2
Slave 11
Slave 10
Slave 9
Slave 8
Inputs from slaves 8-11
IR n+3
Slave 15
Slave 14
Slave 13
Slave 12
Inputs from slaves 12-15
IR n+4
Slave 19
Slave 18
Slave 17
Slave 16
Inputs from slaves 16-19
IR n+5
Slave 23
Slave 22
Slave 21
Slave 20
Inputs from slaves 20-23
IR n+6
Slave 27
Slave 26
Slave 25
Slave 24
Inputs from slaves 24-27
IR n+7
Slave 31
Slave 30
Slave 29
Slave 28
Inputs from slaves 31-28
D3 D2 D1 D0 D3 D2 D1 D0 D3 D2 D1 D0 D3 D2 D1 D0
Data bits from slaves
Outputs
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
IR bits
IR m
Slave 3
Slave 2
Slave 1
Command Bits
Outputs to slaves 1-3
IR m+1
Slave 7
Slave 6
Slave 5
Slave 4
Outputs to slaves 4-7
IR m+2
Slave 11
Slave 10
Slave 9
Slave 8
Outputs to slaves 8-11
IR m+3
Slave 15
Slave 14
Slave 13
Slave 12
Outputs to slaves 12-15
IR m+4
Slave 19
Slave 18
Slave 17
Slave 16
Outputs to slaves 16-19
IR m+5
Slave 23
Slave 22
Slave 21
Slave 20
Outputs to slaves 20-23
IR m+6
Slave 27
Slave 26
Slave 25
Slave 24
Outputs to slaves 24-27
IR m+7
Slave 31
Slave 30
Slave 29
Slave 28
Outputs to slaves 31-28
D3 D2 D1 D0 D3 D2 D1 D0 D3 D2 D1 D0 D3 D2 D1 D0
Data bits to slaves
If the I/O range is restricted by the setting of the front panel DIP switches 1-3,
unused IR words can be allocated to other I/O units or used as work bits.
Note: The PLC scan cycle and the AS-Interface cycle are independent and
unsynchronised. Output data transferred to the CQM1-ARM21 in one PLC
scan can arrive at subsequent slave addresses with a delay of up to 5 ms (i.e.
the maximum AS-Interface cycle time). This depends on which slave has just
been serviced in the AS-Interface cycle. Data consistency is only guaranteed
within one slave’s data ’nibble’.
Содержание CQM1-ARM21
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Страница 3: ...CQM1 ARM21 AS Interface Master Unit Operation Manual Produced April 1999...
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