NXP Semiconductors SAFE ASSURE FRDMGD3162HBIEVM, Руководство пользователя, Страница: 42 / 43

NXP Semiconductors
UM11729
FRDMGD3162HBIEVM half-bridge evaluation board
Tables
Tab. 1. Device features ................................................. 6
Tab. 2. Low-voltage domain 24-pin connector
definitions .......................................................... 8
Tab. 3. Test point definitions ....................................... 10
Tab. 4. Jumper definitions ........................................... 11
Tab. 5. LED interrupt indicators ...................................14
Tab. 6. Translator board jumper definitions .................16
Figures
Fig. 1. FRDMGD3162HBIEVM ..................................... 3
Fig. 2. Connecting FRDM-KL25Z, GD31xx
half-bridge EVB and translator board ................7
Fig. 3. Evaluation board voltage and interface
domains .............................................................8
Fig. 4. Key test point locations .....................................9
Fig. 5. Power supply and jumper configuration .......... 11
Fig. 6. Evaluation board bottom view ......................... 12
Fig. 7. Gate drive resistors .........................................13
Fig. 8. LED interrupt indicators ...................................14
Fig. 9. Freedom development platform ...................... 15
Fig. 10. Translator board .............................................. 16
Fig. 11. Evaluation board and system setup ................ 17
Fig. 12. Power module ................................................. 18
Fig. 13. FRDM-KL25Z setup and interface ...................19
Fig. 14. Kit selection .....................................................20
Fig. 15. GUI settings menu .......................................... 21
Fig. 16. Loader settings ................................................22
Fig. 17. Logs settings ................................................... 22
Fig. 18. Register map settings ..................................... 23
Fig. 19. Tabs settings ................................................... 23
Fig. 20. Command Log area ........................................ 24
Fig. 21. Device pins settings and status menus ........... 25
Fig. 22. Pins tab functionality ....................................... 26
Fig. 23. Status tab functionality ....................................27
Fig. 24. Analog tab functionality ...................................27
Fig. 25. Gate strength tab functionality ........................ 28
Fig. 26. Register map ...................................................29
Fig. 27. Gate drive tab ................................................. 30
Fig. 28. Current sense tab ........................................... 31
Fig. 29. Desat and segmented drive tab ...................... 32
Fig. 30. Overtemperature tab ....................................... 33
Fig. 31. Undervoltage and overvoltage threshold
tab ................................................................... 34
Fig. 32. Measurements tab ...........................................35
Fig. 33. Status tab ........................................................36
Fig. 34. Pulse tab ......................................................... 37
UM11729 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved.
User manual Rev. 1 — 21 February 2022
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