NXP Semiconductors SAFE ASSURE FRDMGD3162HBIEVM Скачать руководство пользователя страница 19 | Manualshive

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NXP Semiconductors SAFE ASSURE FRDMGD3162HBIEVM Скачать руководство пользователя страница 19

NXP Semiconductors

UM11729

FRDMGD3162HBIEVM half-bridge evaluation board

6.2 Configuring the FRDM-KL25Z microcode

Figure 13. FRDM-KL25Z setup and interface

By default, the FRDM-KL25Z delivered with this kit is preprogrammed with the current

and most up-to-date firmware available for the kit.
A way to check quickly that the microcode is programmed and the board is functioning

properly, is to plug the KL25Z into the computer, open FlexGUI, and verify that the

software version at the bottom is 6.4 or later (see

).

If a loss of functionality following a board reset, reprogramming, or a corrupted data

issue, the microcode may be rewritten per the following steps:

1. To clear the memory and place the board in boot loader mode, hold down the reset

button while plugging a USB cable into the

OpenSDA

USB port.

2. Verify that the board appears as a BOOTLOADER device and continue with step 3. If

the board appears as KL25Z, you may go to step 6.

3. Download the

Firmware Apps

.zip archive from the PEmicro OpenSDA webpage

(

http://www.pemicro.com/opensda/

). Validate your email address to access the files.

4. Find the most recent MDS-DEBUG-FRDM-KL25Z_Pemicro_v118.SDA and

copy/drag-and-drop into the

BOOTLOADER

device.

5. Reboot the board by unplugging and replugging the connection to the

OpenSDA

port. Verify now that the device appears as a KL25Z device to continue.

6. Locate the most recent KL25Z firmware; which is distributed as part of the FlexGUI

package.

a. From the FlexGUI install directory or zip file, downloaded, find the firmware bin

file “flexgui-fw-KL25Z_usb_hid_gd31xx-Vx.x.x.bin”.

b. This .bin file is a product/family-specific configuration file for FRDM-KL25Z

containing the pin definitions, SPI/PWM generation code, and pin mapping

assignments necessary to interface with the translator board as part of

FRDMGD3162HBIEVM.

UM11729

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2022. All rights reserved.

User manual

Rev. 1 — 21 February 2022

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Содержание SAFE ASSURE FRDMGD3162HBIEVM

Страница 1: ...21 February 2022 User manual Document information Information Content Keywords automotive half bridge GD3162 gate driver Abstract This document describes key features and usage requirements for perfor...

Страница 2: ...lf bridge evaluation board Rev Date Description 1 20220221 initial version Revision history UM11729 All information provided in this document is subject to legal disclaimers NXP B V 2022 All rights re...

Страница 3: ...y depends on proper printed circuit board layout and heat sinking design as well as attention to supply filtering transient suppression and I O signal quality The product provided may not be complete...

Страница 4: ...e FRDMGD3162HBIEVM 1 Go to http www nxp com FRDMGD3162HBIEVM 2 On the Overview tab locate the Jump To navigation feature on the left side of the window 3 Select the Get Started link review each entry...

Страница 5: ...a PC installed with FlexGUI software for communication to the serial peripheral interface SPI registers on the GD3162 gate drive devices in either daisy chain or standalone configuration The KITGD316...

Страница 6: ...ith current sense feedback Compliant with automotive safety integrity level ASIL C D ISO 26262 functional safety requirements SPI interface for safety monitoring programmability and flexibility Integr...

Страница 7: ...valuation board is designed to connect to a HybridPACK Drive module for evaluation of the GD3162 performance and capabilities Figure 2 Connecting FRDM KL25Z GD31xx half bridge EVB and translator board...

Страница 8: ...ive pull down strength control logic 5 PWML pulse width modulation PWM input low side 6 INTBL interrupt bar low side 7 MOSIL master out slave in low side 8 SCLK serial clock input 9 MISOL master in sl...

Страница 9: ...low side 20 AOUTH duty cycle encoded signal high side 21 PWMH PWM input high side 22 FSSTATEH fail safe state high side 23 GND ground 24 INTBH interrupt bar high side Table 2 Low voltage domain 24 pi...

Страница 10: ...point DSTL VCE desaturation test point connected to low side driver DESAT pin and circuitry VEEL negative voltage supply test point for low side driver gate of IGBT or SiC module VDC DC link voltage t...

Страница 11: ...w side PWMLSEL J14 2 3 dead time fault protection disabled use for short circuit testing open VCCREG controls gate voltage VCCH and VCCL closed VCC and VCCREG are tied together 1 2 chip select for nor...

Страница 12: ...y enable tied to VSUP R37 adjusts VCCH and VCCL level R1 adjusts negative VEEL level R61 adjusts negative VEEH level Table 4 Jumper definitions continued 4 4 4 Bottom view Figure 6 Evaluation board bo...

Страница 13: ...stors in series with GL_1 strong gate discharge turn off pin and GL_2 weak gate discharge turn off pin and HybridPACK Drive module gate These gate drive output pins control the turn off of the SiC MOS...

Страница 14: ...t pin of low side driver indicating reported fault status when on active LOW High side INTB connected to the INTB interrupt output pin of high side driver indicating reported fault status when on acti...

Страница 15: ...Freedom KL25Z is an ultra low cost development platform for Kinetis L series MCU built on Arm Cortex M0 processor Figure 9 Freedom development platform UM11729 All information provided in this docume...

Страница 16: ...VCCSEL J3 2 3 selects 3 3 V for 3 3 V compatible gate drive 1 2 selects PWM high side control from KL25Z MCU PWMH_SEL J4 2 3 selects PWM high side control from fiber optic receiver inputs 1 2 selects...

Страница 17: ...ltage probe High sample rate digital oscilloscope with probes DC link capacitor compatible with HybridPACK Drive module IGBT or SiC MOSFET HybridPACK Drive module Windows based PC High voltage DC powe...

Страница 18: ...10 or Windows 8 based operating system To install the software do the following 1 Go to www nxp com FlexGUI and click Download 2 When the FlexGUI software page appears click Download and select the ve...

Страница 19: ...p 3 If the board appears as KL25Z you may go to step 6 3 Download the Firmware Apps zip archive from the PEmicro OpenSDA webpage http www pemicro com opensda Validate your email address to access the...

Страница 20: ...sing the FlexGUI The FlexGUI is available from http www nxp com FlexGUI as an evaluation tool demonstrating GD31xx specific functionality configuration and fault reporting FlexGUI also includes basic...

Страница 21: ...n board FlexGUI settings Access settings by selecting Settings from the File menu Figure 15 GUI settings menu UM11729 All information provided in this document is subject to legal disclaimers NXP B V...

Страница 22: ...tion board The Loader and Logs settings are shown below Figure 16 Loader settings Figure 17 Logs settings UM11729 All information provided in this document is subject to legal disclaimers NXP B V 2022...

Страница 23: ...cting Settings from the File menu The Register Map and Tabs settings are shown below Figure 18 Register map settings Figure 19 Tabs settings UM11729 All information provided in this document is subjec...

Страница 24: ...ard Command Log window The Command Log area informs the user about application events Figure 20 Command Log area UM11729 All information provided in this document is subject to legal disclaimers NXP B...

Страница 25: ...corner of the main application window GD3162 tab functionality Switch modes between run and configuration mode Set SPI frequency Figure 21 Device pins settings and status menus UM11729 All information...

Страница 26: ...tional state FSENB enable disable fail safe enable EN_PS enables flyback supply on EVB at 17 V VCC on high side and low side FSSTATEL and FSSTATEH set the fail safe state when FSENB is enabled PWML an...

Страница 27: ...ll faults and automatically poll status registers Figure 23 Status tab functionality Analog tab functionality Read and poll ADC values from the high voltage domain Displays raw ADC and converted value...

Страница 28: ...c 1 in MODE2 register and bit settings in config register STATCON4 Gate strength can also be configured providing logic level in drop down menu on GS_ENH and GS_ENL input pins GSSPI_EN must be logic 0...

Страница 29: ...be set to copy automatically Reset button to undo the changes on the write line and reset to the previous value Global register controls perform the selected command on all registers with the checkbox...

Страница 30: ...ols are disabled when not in config mode Provides a more intuitive visual way to set parameters All settings are automatically synchronized with the register controls Figure 27 Gate drive tab UM11729...

Страница 31: ...to current sense Provides a more intuitive visual way to set parameters All settings are automatically synchronized with the register controls Figure 28 Current sense tab UM11729 All information prov...

Страница 32: ...nd segmented drive Provides a more intuitive visual way to set parameters All settings are automatically synchronized with the register controls Figure 29 Desat and segmented drive tab UM11729 All inf...

Страница 33: ...nd overtemperature warning thresholds Provides a more intuitive visual way to set parameters All settings are automatically synchronized with the register controls Figure 30 Overtemperature tab UM1172...

Страница 34: ...age and overvoltage threshold Provides a more intuitive visual way to set parameters All settings are automatically synchronized with the register controls Figure 31 Undervoltage and overvoltage thres...

Страница 35: ...board Measurements tab Allows monitoring and graphing of ADC and temperature values Figure 32 Measurements tab UM11729 All information provided in this document is subject to legal disclaimers NXP B V...

Страница 36: ...ter values Status 1 and Status 2 faults can be cleared Status mask registers can be modified when in configuration mode Red indicates that a fault has been latched Figure 33 Status tab UM11729 All inf...

Страница 37: ...t report fault Set PWMH_SEL J4 and PWML_SEL J5 jumpers properly for desired control method 3 3 V to 5 0 V translator board reviewed in Section 4 6 Check PWM control signal Ensure that proper PWM signa...

Страница 38: ...reshold at the GD3162 pin to be crossed later than commanded Check translator output voltage selection J3 is configured to the same level as the GD3162 VDD Check VCCSEL supply or translator outputs on...

Страница 39: ...ime For short circuit test set PWMLSEL J14 and PWMHSEL J10 to bypass dead time See Section 4 4 3 for details Check VSUP VDD for undervoltage condition VDD_UV latches SPI buffer contents preventing upd...

Страница 40: ...NXP Semiconductors its affiliates and their suppliers expressly disclaim all warranties whether express implied or statutory including but not limited to the implied warranties of non infringement me...

Страница 41: ...names and trademarks are the property of their respective owners NXP wordmark and logo are trademarks of NXP B V Kinetis is a trademark of NXP B V SafeAssure is a trademark of NXP B V UM11729 All info...

Страница 42: ...Fig 11 Evaluation board and system setup 17 Fig 12 Power module 18 Fig 13 FRDM KL25Z setup and interface 19 Fig 14 Kit selection 20 Fig 15 GUI settings menu 21 Fig 16 Loader settings 22 Fig 17 Logs se...

Страница 43: ...ors 14 4 5 Kinetis KL25Z Freedom board 15 4 6 3 3 V to 5 0 V translator board 16 5 Configuring the hardware 17 6 Installation and use of software tools 18 6 1 Installing FlexGUI on your computer 18 6...

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