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NXP Semiconductors
UM11729
FRDMGD3162HBIEVM half-bridge evaluation board
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Gate strength tab functionality
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Read and poll the pull-up and pull-down gate strength that can either be controlled
by GSSPI_EN set to logic 1 in MODE2 register and bit settings in config register
STATCON4
–
Gate strength can also be configured providing logic level in drop-down menu on
GS_ENH and GS_ENL input pins. GSSPI_EN must be logic 0 (default state)
Figure 25. Gate strength tab functionality
UM11729
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User manual
Rev. 1 — 21 February 2022
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