35.
Built-In Self Test (BIST)
MN700004 Rev 01
379
ESB26#self-testProcessingBIST by request... CPUCore Test :CPUNotify
RAM Test :CPUInterface Test : UART Existence - PassedTestingSwitch
Core : Crossbar Existence - PassedOn-boardPower Test : On-board
Power PHY - Passed On-board Power CPU - Passed On-board Power OC -
PassedTemperatureTest : Temperature - PassedBroadcastLimit
Test : Broadcast Limit - Passed
BIST Commands
The available BIST commands are summarized in Table 35-2.
Table 35-2 BIST Commands
C o m m a n d D e s c r i p t i o n
self-test
Initiates BIST by Request.
show self-test
Issues a report on the current built-in test status (obtained by the last BIST).
Description of Commands
self-test
The
self-test
command, in Privileged (Enable) mode, initiates BIST by Request. All BIST
tests are executed except for
CPU Notify RAM Test
(not allowed because it resets the
memory). Execution of BIST by Request updates the statuses of test results. The command
issues a full BIST status report (except for the
CPU Notify RAM Test
).
Command Syntax
device-name
#
self-test
device-name
#
no self-test
Example
device-name#self-test
Processing BIST by request...
CPU Core Test :
CPU Validation - Passed
CPU Notify RAM Test :
RAM Validation - Passed
CPU Interface Test :
UART Existence - Passed
Testing Switch Core :
Crossbar Existence - Passed
On-board Power Test :
