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CHAPTER 3 CPU ARCHITECTURE
Preliminary User’s Manual U13420EJ2V0UM00
3.4.2 Register addressing
[Function]
The general register to be specified is accessed as an operand with the register specify code (Rn and RPn)
of an instruction word in the registered bank specified with the register bank select flag (RBS0 to RBS1).
Register addressing is carried out when an instruction with the following operand format is executed. When
an 8-bit register is specified, one of the eight registers is specified with 3 bits in the operation code.
[Operand format]
Identifier
Description
r
X, A, C, B, E, D, L, H
rp
AX, BC, DE, HL
‘r’ and ‘rp’ can be described with absolute names (R0 to R7 and RP0 to RP3) as well as function names (X,
A, C, B, E, D, L, H, AX, BC, DE, and HL).
[Description example]
MOV A, C; when selecting C register as r
Operation code
0 1 1 0 0 0 1 0
Register specify code
INCW DE; when selecting DE register pair as rp
Operation code
1 0 0 0 0 1 0 0
Register specify code
Содержание mPD780065 Series
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