11
Preliminary User’s Manual U13420EJ2V0UM00
CONTENTS
CHAPTER 1 OUTLINE ......................................................................................................................
25
1.1
Features ................................................................................................................................
25
1.2
Applications .........................................................................................................................
26
1.3
Ordering Information ...........................................................................................................
26
1.4
Pin Configuration (Top View) ..............................................................................................
27
1.5
78K/0 Series Lineup .............................................................................................................
29
1.6
Block Diagram ......................................................................................................................
31
1.7
Outline of Function ..............................................................................................................
32
CHAPTER 2 PIN FUNCTION ............................................................................................................
33
2.1
Pin Functions .......................................................................................................................
33
2.2
Description of Pin Functions ..............................................................................................
36
2.2.1
P00 to P07 (Port 0) ....................................................................................................................
36
2.2.2
P20 to P27 (Port 2) ....................................................................................................................
36
2.2.3
P30 to P37 (Port 3) ....................................................................................................................
37
2.2.4
P40 to P47 (Port 4) ....................................................................................................................
37
2.2.5
P50 to P57 (Port 5) ....................................................................................................................
37
2.2.6
P64 to P67 (Port 6) ....................................................................................................................
37
2.2.7
P70 to P77 (Port 7) ....................................................................................................................
38
2.2.8
P80 to P84 (Port 8) ....................................................................................................................
39
2.2.9
P90 to P92 (Port 9) ....................................................................................................................
39
2.2.10 ANI0 to ANI7 ..............................................................................................................................
39
2.2.11 AV
REF
..........................................................................................................................................
40
2.2.12 AV
SS
............................................................................................................................................
40
2.2.13 RESET .......................................................................................................................................
40
2.2.14 X1 and X2 ..................................................................................................................................
40
2.2.15 XT1 and XT2 ..............................................................................................................................
40
2.2.16 V
DD0
and V
DD1
.............................................................................................................................
40
2.2.17 V
SS0
and V
SS1
.............................................................................................................................
40
2.2.18 V
PP
(flash memory version only) .................................................................................................
40
2.2.19 IC (mask ROM version only) ......................................................................................................
40
2.3
Pin I/O Circuits and Recommended Connections of Unused Pins .................................
41
CHAPTER 3 CPU ARCHITECTURE .................................................................................................
43
3.1
Memory Space ......................................................................................................................
43
3.1.1
Internal program memory space ................................................................................................
45
3.1.2
Internal data memory space .......................................................................................................
47
3.1.3
Special Function Register (SFR) area .......................................................................................
47
3.1.4
External memory space .............................................................................................................
47
3.1.5
Data memory addressing ...........................................................................................................
48
Содержание mPD780065 Series
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