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CHAPTER 13 SERIAL INTERFACE (UART0)
Preliminary User’s Manual U13420EJ2V0UM00
(5) Reception control circuit
The reception control circuit controls receive operations based on the values set to the asynchronous serial
interface mode register (ASIM0). During a receive operation, it performs error checking, such as for parity errors,
and sets various values to the asynchronous serial interface status register (ASIS0) according to the type of error
that is detected.
13.3 Registers to Control Serial Interface (UART0)
The serial interface (UART0) uses the following three types of registers for control functions.
• Asynchronous serial interface mode register (ASIM0)
• Asynchronous serial interface status register (ASIS0)
• Baud rate generator control register (BRGC0)
(1) Asynchronous serial interface mode register (ASIM0)
This is an 8-bit register that controls serial interface (UART0)’s serial transfer operations.
ASIM0 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets ASIM0 to 00H.
Figure 13-2 shows the format of ASIM0.
Caution
In UART mode, set the port mode register (PMXX) as follows. In each case, set the output latch
to 0.
• During receive operation
Set P73 (RxD0) to input mode (PM73 = 1)
• During transmit operation
Set P72 (TxD0) to output mode (PM72 = 0)
• During transmit/receive operation
Set P73 (RxD0) to input mode, and P72 to output mode
Содержание mPD780065 Series
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