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Preliminary User’s Manual U16035EJ1V0UM
CHAPTER 3 CPU ARCHITECTURE
3.1 Memory Spaces
µ
PD780024AS, 780034AS Subseries can access 64 KB memory space respectively.
Figures 3-1 to 3-5 show memory maps.
Caution
In case of the internal memory capacity, the initial value of memory size switching register (IMS)
of all products (
µ
PD780024AS, 780034AS Subseries) is fixed (CFH). Therefore, set the value
corresponding to each products indicated below.
µ
PD780021AS, 780031AS: 42H
µ
PD780022AS, 780032AS: 44H
µ
PD780023AS, 780033AS: C6H
µ
PD780024AS, 780034AS: C8H
µ
PD78F0034BS:
Value for mask ROM version
Figure 3-1. Memory Map (
µ
PD780021AS, 780031AS)
0000H
Data memory
space
General-purpose
registers
32
×
8 bits
Internal ROM
8192
×
8 bits
1FFFH
1000H
0FFFH
0800H
07FFH
0080H
007FH
0040H
003FH
0000H
CALLF entry area
CALLT table area
Vector table area
Program area
Program area
Program
memory
space
2000H
1FFFH
FEE0H
FEDFH
FF00H
FEFFH
FFFFH
Internal high-speed RAM
512
×
8 bits
Special function
registers (SFRs)
256
×
8 bits
Reserved
FD00H
FCFFH