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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
Preliminary User’s Manual U16035EJ1V0UM
7.2 Configurations of 8-Bit Timer/Event Counters 50 and 51
8-bit timer/event counters 50 and 51 consist of the following hardware.
Table 7-1. Configuration of 8-Bit Timer/Event Counters 50 and 51
Item
Configuration
Timer register
8-bit timer counter 5n (TM5n)
Register
8-bit timer compare register 5n (CR5n)
Timer output
2 (TO5n)
Control registers
Timer clock select register 5n (TCL5n)
8-bit timer mode control register 5n (TMC5n)
Port mode register 7 (PM7)
Note
Note
See
Figure 4-11 Block Diagram of P70 to P73.
Remark
n = 0, 1
(1) 8-bit timer counter 5n (TM5n: n = 0, 1)
TM5n is an 8-bit read-only register which counts the count pulses.
The counter is incremented in synchronization with the rising edge of a count clock.
TM50 and TM51 can be connected in cascade and used as a 16-bit timer.
When TM50 and TM51 can be connected in cascade and used as a 16-bit timer, they can be read by a 16-bit
memory operation instruction. However, since they are connected by an internal 8-bit bus, TM50 and TM51 are
read separately in two times. Thus, take read during count change into consideration and compare them in two
times reading. When count value is read during operation, count clock input is temporary stopped, and then the
count value is read. In the following situations, count value is set to 00H.
<1>
RESET input
<2>
When TCE5n is cleared
<3>
When TM5n and CR5n match in clear & start mode on match between TM5n and CR5n.
Caution
In cascade connection mode, the count value is reset to 00H when the lowest timer TCE5n
is cleared.
Remark
n = 0, 1
(2) 8-bit timer compare register 5n (CR5n: n = 0, 1)
The value set in CR5n is constantly compared with the 8-bit timer counter (TM5n) count value, and an interrupt
request (INTTM5n) is generated if they match (except PWM mode).
It is possible to rewrite the value of CR5n within 00H to FFH during count operation.
When TM50 and TM51 can be connected in cascade and used as a 16-bit timer, CR50 and CR51 operate as
the 16-bit compare register. It compares count value with register value, and if the values are matched, an interrupt
request (INTTM50) is generated. INTTM51 interrupt request is also generated at this time. Thus, when TM50
and TM51 are used as cascade connection, mask INTTM51 interrupt request.
Caution
When changing the set value of 8-bit compare register 5n (CR5n) in cascade connection mode,
change the value after stopping the timer operation of cascade-connected 8-bit timer counter
5n (TM5n).
Remark
n = 0, 1
