9-18
MCF5272 User’s Manual
SDRAM Interface
Figure 9-9. SDRAM Burst Read, 32-Bit Port, Page Miss, Access = 9-1-1-1
Figure 9-10 shows a similar burst read that hits the page. As in the page-miss example, the
SDRAM controller takes a clock cycle (T2) to determine whether the access is a hit or a
miss. Because it is a hit, the burst operation follows immediately.
Col
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
Data
Data
Data
Data
Row
Col
Col
Col
Row
Bank x
Bank y
Bank y
SDCLK
SDCLKE
SDADR[13:0]
10_PRECHG
SDBA[1:0]
SDCS
RAS0
CAS0
SDWE
BS[3:0]
D[31:0]
Issue
Address
Page
Hit or
Miss?
Precharge
Old Page
Activate
New Page
CF2 Core
1
Read
2
Read
4
Read
3
(7)
Read
CASL = 2
Содержание DigitalDNA ColdFire MCF5272
Страница 1: ...MCF5272UM D Rev 0 02 2001 MCF5272 ColdFire Integrated Microprocessor User s Manual ...
Страница 38: ...xxxviii MCF5272 User s Manual TABLES Table Number Title Page Number ...
Страница 58: ...1 10 MCF5272 User s Manual MCF5272 Specific Features ...
Страница 90: ...2 42 MCF5272 User s Manual Exception Processing Overview ...
Страница 96: ...3 6 MCF5272 User s Manual MAC Instruction Execution Timings ...
Страница 158: ...5 46 MCF5272 User s Manual Motorola Recommended BDM Pinout ...
Страница 184: ...7 12 MCF5272 User s Manual Interrupt Controller Registers ...
Страница 338: ...13 44 MCF5272 User s Manual Application Examples ...
Страница 414: ...18 6 MCF5272 User s Manual PWM Programming Model ...
Страница 452: ...19 38 MCF5272 User s Manual Power Supply Pins ...
Страница 482: ...20 30 MCF5272 User s Manual Reset Operation ...
Страница 492: ...21 10 MCF5272 User s Manual Non IEEE 1149 1 Operation ...
Страница 548: ...INDEX Index 12 MCF5272 User s Manual ...