Mindray DC-25, Руководство по обслуживанию

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4-4 Hardware Principle

BF FPGA combines 32 channel echo signal to output to DSP FPGA, and DSP
FPGA is sent to signal processing to a single image which is uploaded to CPU
module by PCIE_PHY, then CPU module performs post processing.

PCI_PHY implements PCIE interface switching.

BF FPGA can communicate with the CPU module through transferring DSP
FPGA.

The CPU module communicates with the probe board via BF FPGA.
4.2.3.2 Back-end of the Main Board
PCIE
PHY
PCIE X1
HDD
VGA USB
Video S-Video Remote
Ethernet
Multifunction
FPGA
LPC
LVDS
U
S
B
CPU module
SATA
+12V
Monitor
SMBUS
Video
Encoder
control data
USB
USB
(side)
System monitor
circuit
Power supply
module
ARM control signal
H
D
D
in
d
ic
a
to
r
Control panel
Main board
Power
indicators
5V
12V
3.3V
12V
5V
Status indicator
Power_BTN_N
ARM
Power
supply
management
FPGA
Control signal
Power on/off signal
DVI
Encoder
data
control
I2C
DVI
Power supply
Communication & control
Video signal
USB
Adapter
board
USB port on the
control panel
IO Interface
board
AUDIO
Figure 4-4 The Schematic Diagram of Back-end Ultrasound System
Back-end of the main board is the core of back-end ultrasound system, which mainly
includes back-end of the main board, CPU module, IO interface board, monitor assembly
and control panel. Mainly implements display interface, user's operation interface, power
module controlling interface and all kinds of
Peripherals Supported interface.
Also provides system monitoring, running status of the monitor system, indicator of
system status and running status of the indicating system via LED.
Function describes as following:

Back-end of the main board connects to front-end of the main board via PCIE
PHY.

The USB on the lateral of Main board is the output of the CPU module.

The relevant signal in HDD of the main board is output of the CPU module.

Back-end of the main board Multifunction FPGA implements display ports, it
also supports monitor assembly, video and s-video interface of IO interface
board.