...........continued
PIO
Power Rail
Function
Signal Description
PD16 VDDIOP1
FLEXCOM3_IO0
Debug UART TX line
PD17 VDDIOP1
FLEXCOM3_IO1
Debug UART RX line
PD18 VDDIOP1
FLEXCOM4_IO0
mikroBUS 1 UART TX line
PD19 VDDIOP1
FLEXCOM4_IO1
mikroBUS 1 UART RX line
PD20 VDDIOP1
PWMH3
LED blue control or mikroBUS 2 PWM control
PD21 VDDIOP1
G1_TXEN/PD21
Transmit enable or RPi connector GPIO
PD22 VDDIOP1
G1_TX0/PDMC0_CLK
Transmit data line 0 or PDM clock line
PD23 VDDIOP1
G1_TX1/PDMC0_DS0
Transmit data line 1 or PDM data line 0
PD24 VDDIOP1
G1_CRSDV/PDMC0_DS1
Carrier sense and data valid or PDM data line 1
PD25 VDDIOP1
G1_RX0/PD25
Receive data line 0 or RPi connector GPIO
PD26 VDDIOP1
G1_RX1/PD26
Receive data line 1 or RPi connector GPIO
PD27 VDDIOP1
G1_RXER/PD27
Receive Error or RPi connector GPIO
PD28 VDDIOP1
G1_MDC/PWML3
Management data clock or RPi connector GPIO
PD29 VDDIOP1
G1_MDIO/PD29
Management data input/output or RPi connector GPIO
PD30 VDDIOP1
G1_TXCK/PD30
Transmit clock or RPi connector GPIO
PD31 VDDIOP1
PD31
RPi connector GPIO
3.2.5.5
PIOE Bank
The PIOE bank is mainly used for the WILC3000 radio module over power rail VDDIOP1.
The following schematic shows the PIOE bank and PIOBUx distributions.
Figure 3-19. SAMA7G5 PIOE Bank Distribution
PIOE Distribution
WILC3000_EN_PE0
EXT40_SPI1_SCLK_PE5
PIOBU0
PIOBU1
PIOBU2
PIOBU3
PE0 E18
PE1 F14
PE2 A18
PE3 C15
PE4 D15
PE5 B16
PE6 G13
PE7 E14
PIOBU0 AA19
PIOBU1 P9
PIOBU2 AA18
PIOBU3 P10
SAMA7G54
U4E
PE1
PE2
PE3
PE4
PE6
PE7
The following table describes each PIOE bank function.
Table 3-9. SAMA7G5 PIOs Pin Assignment and Signal Description
PIO
Power Rail
Function
Signal Description
PE0
VDDIOP1
PE0
ATWILC3000 enable control signal
PE1
VDDIOP1
PE1
RPi connector SPI chip enable 2 or RPi CSI camera GPIO
PE2
VDDIOP1
PWML0/PE2
RPi connector PWM signal or RPi CSI camera GPIO
SAMA7G54-EK
Function Blocks
©
2022 Microchip Technology Inc.
and its subsidiaries
User Guide
DS50003273A-page 29