Figure 3-15. SAMA7G5 PIOA Bank Distribution
PIOA Distribution
SDMMC0_CK_PA0
SDMMC0_CMD_PA1
SDMMC0_RSTN_PA2
SDMMC0_DAT0_PA3
SDMMC0_DAT1_PA4
SDMMC0_DAT2_PA5
SDMMC0_DAT3_PA6
SDMMC0_DAT4_PA7
SDMMC0_DAT5_PA8
SDMMC0_DAT6_PA9
SDMMC0_DAT7_PA10
SDMMC0_DS_PA11
SDMMC0_CD_PA14
ETH0_TXEN_PA15
ETH0_TX0_PA16
ETH0_TX1_PA17
ETH1_INT_PA21
ETH0_RX0_PA19
ETH0_RX1_PA20
ETH0_RXCTL_PA18
ETH0_MDC_PA22
ETH0_MDIO_PA23
ETH0_TXCK_PA24
ETH0_125CK_PA25
ETH0_TX2_PA26
ETH0_TX3_PA27
ETH0_RX2_PA28
ETH0_RX3_PA29
ETH0_RXCK_PA30
ETH0_INT_PA31
USER_BUTTON_PA12
PA0 H17
PA1 G20
PA2 L13
PA3 L14
PA4 K13
PA5 C21
PA6 K14
PA7 H16
PA8 B21
PA9 D20
PA10 J15
PA11 F20
PA12 V14
PA13 AA16
PA14 AA20
PA15 V15
PA16 Y15
PA17 V16
PA18 Y16
PA19 V20
PA20 Y21
PA21 V21
PA22 Y18
PA23 R13
PA24 Y19
PA25 U14
PA26 W16
PA27 W18
PA28 T14
PA29 W19
PA30 R14
PA31 W20
SAMA7G54
U4A
PA13
The following table describes each PIOA bank function.
Table 3-5. SAMA7G5 PIOs Pin Assignment and Signal Description
PIO
Power Rail
Function
Signal Description
PA0
VDDSDMMC0
SDMMC0_CK
e.MMC clock Signal
PA1
VDDSDMMC0
SDMMC0_CMD
e.MMC command line
PA2
VDDSDMMC0
SDMMC0_RSTN
e.MMC reset signal
PA3
VDDSDMMC0
SDMMC0_DAT0
e.MMC data line 0
PA4
VDDSDMMC0
SDMMC0_DAT1
e.MMC data line 1
PA5
VDDSDMMC0
SDMMC0_DAT2
e.MMC data line 2
PA6
VDDSDMMC0
SDMMC0_DAT3
e.MMC data line 3
PA7
VDDSDMMC0
SDMMC0_DAT4
e.MMC data line 4
PA8
VDDSDMMC0
SDMMC0_DAT5
e.MMC data line 5
PA9
VDDSDMMC0
SDMMC0_DAT6
e.MMC data line 6
PA10
VDDSDMMC0
SDMMC0_DAT7
e.MMC data line 7
PA11
VDDSDMMC0
SDMMC0_DS
e.MMC data strobe
PA12
VDDIOP0
PA12
User button
PA13
VDDIOP0
PWMH2
Green LED control or mikroBUS 1 PWM control
PA14
VDDIOP0
SDMMC0_CD
e.MMC card detect
SAMA7G54-EK
Function Blocks
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2022 Microchip Technology Inc.
and its subsidiaries
User Guide
DS50003273A-page 22