Lucent Technologies DSP1611, Информационное руководство

Страница: 139 / 443

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual
Instruction Set April 1998
4-22
DRAFT COPY
Lucent Technologies Inc.
4.5 Instruction Set
(continued)
4.5.5 Multiply/ALU Group
The multiply/ALU instructions are the primary instructions used to implement signal-processing algorithms. State-
ments from this group can be combined to generate multiply/accumulate, logical, and other ALU functions and to
simultaneously transfer data between memory and registers in the data arithmetic unit. In the examples presented,
the statements should be read from right to left and top to bottom. Statements within a multiply/ALU instruction are
executed essentially in parallel. The multiply/ALU instructions usually consist of more than one part. Each part of
an instruction is called a statement. The general rule is that valid instructions can be formed by choosing one
statement from each statement column in
Table 4-12 . If either statement is not required, a single statement from
either column also constitutes a valid instruction. Conversely, valid instructions can be decomposed into separate
statements with each coming from a different column in
Table 4-12 .
The multiply/ALU instructions consist of two types of statements: a function and a transfer (see Table 4-12 ). The
statements in the function column can be separated into two more types: those involving the multiplier and those
involving only the ALU in the data arithmetic unit. The multiply/accumulate instructions typically used in signal-pro-
cessing applications are assembled by using statements from the function column that include the multiplication of
the data in x and y bits 31—16. In a full multiply/accumulate instruction, the x and y registers are loaded with the
operands, the product of the previous operands is generated, and the previous product is accumulated in a0 or a1.
The following example shows how a typical multiply/accumulate sequence is implemented.
Example:
In the example presented, the data in the X source is copied into the x register and the data in the Y source into
bits 31—16 of the y register in line 1. In line 2, the product of the data in x and y[31—16] is generated and stored
in p. In line 3, the data in the source accumulator (aS) and the data in p are added and the result is loaded into the
destination accumulator. Note that lines 2 and 3 could also have specified memory transfer operations for later
instructions.
Section 2.1.2, Concurrent Operations has more detail on the above pipeline.
The ALU statements perform one of the following:
The logical operations of AND, OR, or XOR between an accumulator and the data in the y register.
The addition or subtraction of data in the y register or p register with accumulator data.
The load of an accumulator with the data in the y register or p register.
The y register or p register must be loaded prior to the ALU operation.
The following example shows how a typical logical operation is implemented.
In this example, the data in the Y source is copied into the y register in line 1. In line 2, the logical AND of the data
in the source accumulator (aS) and the data in y as a result of line 1 are calculated. The result is loaded into the
destination accumulator.
Instruction #
(1) y = Y x = X
(2) p = x
*
y
(3) aD = aS + p
(1) y = Y
(2) aD = aS & y