DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Information Manual
Instruction Set
April 1998
4-24
DRAFT COPY
Lucent Technologies Inc.
4.5 Instruction Set
(continued)
4.5.5 Multiply/ALU Group (continued)
Loads of a0, a1, and y clear the lower half of the selected register if the appropriate CLR field bits in the auc reg-
ister are zeroed.
Loads of a0l, a1l, and yl do not change the data in the high half of the selected register.
The y and p operands are sign-extended through the guard bits[35:32] for operations with the accumulators.
Single-Cycle Square
By setting the X=Y= bit in the auc register, any instruction that loads the upper word of the y register also loads the
x register with the same value. A subsequent instruction to multiply the x register and y register results in the
square of the value being placed in the p register. The instruction a0 = a0+p
p = x
*
y
y = *r1++ is executed
from the cache with the X=Y= bit set. It will read the value pointed to by r1, load it to both x and y, square the pre-
viously fetched value, and transfer the previous square to a0. A table of values pointed to by r1 can, thus, be
squared in a pipeline with one instruction cycle per each value. The following sample program demonstrates the
use of the single-cycle square.
a0=a0^a0
/* clear accumulator
*/
auc=0x80
/* enable X=Y=
*/
r1=table
/* initialize pointer */
y=*r1++/* load both x and y with first value*/
p=x
*
y y=*r1++/* square, and load x and y with second*/
/* value
*/
do 100 {
/* set up cache loop of 100 repeats*/
a0=a0+pp=x
*
yy=*r1++/* accumulate, square, and load both x*/
/* and y
*/
}
/* end of cache loop */
auc=0x0
/* turn off single-cycle square mode*/
If the X=Y= bit is set and the hardware development system is used, breakpoints or single-stepping will corrupt the
x register. It is best to set the X=Y= bit just before the single-cycle routine is used and clear it just after.
Table 4-13. Replacement Table for Multiply/ALU Instructions
Replace
Value
Meaning
aD, aS, aT
a0, a1
One of two DAU accumulators.
X
*pt++
*pt++i
X-space location pointed to by pt. pt is postmodified by +1 and i, respectively.
Y
*rM
*rM++
*rM– –
*rM++j
Y-space location pointed to by rM (M = 0, 1, 2, 3). rM is postmodified by 0, +1,
–1, and j, respectively.
Z
*rMzp, *rMpz,
*rMm2, *rMjk
Read/write compound addressing in Y space. rM (M = 0, 1, 2, 3) is used
twice. First, postmodified by 0, +1, –1, and j, respectively; and second, post-
modified by +1, 0, + 2, and k, respectively.
Содержание DSP1611
Страница 18: ...Chapter 1 Introduction...
Страница 27: ...Chapter 2 Hardware Architecture...
Страница 52: ...Chapter 3 Software Architecture...
Страница 116: ...Chapter 4 Instruction Set...
Страница 154: ...Chapter 5 Core Architecture...
Страница 176: ...Chapter 6 External Memory Interface...
Страница 208: ...Chapter 7 Serial I O...
Страница 237: ...Chapter 8 Parallel I O DSP1617 Only...
Страница 261: ...Chapter 9 Parallel Host Interface PHIF DSP1611 18 27 28 29 Only...
Страница 275: ...Chapter 10 Bit I O Unit...
Страница 284: ...Chapter 11 JTAG Test Access Port...
Страница 306: ...Chapter 12 Timer...
Страница 313: ...Chapter 13 Bit Manipulation Unit...
Страница 325: ...Chapter 14 Error Correction Coprocessor DSP1618 28 Only...
Страница 350: ...Chapter 15 Interface Guide...
Страница 367: ...Appendix A Instruction Encoding...
Страница 379: ...Appendix B Instruction Set Summary...
Страница 381: ...aD extractz aS IM16 B 52 aD insert aS arM B 53 aD insert aS IM16 B 54 aD aS aaT B 55...
Страница 437: ...Index...