
Information Manual
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998
Error Correction Coprocessor (DSP1618/28 Only)
Lucent Technologies Inc.
DRAFT COPY
14-3
14.2 Hardware Architecture
14.2.1 Branch Metric Unit
The branch metric unit of the ECCP performs full-precision real and complex arithmetic for computing 16-bit incre-
mental branch metrics required for MLSE equalization and convolutional decoding. The branch metric unit per-
forms either MLSE equalization or convolutional decoding depending on configuration.
MLSE Equalization: To generate the estimated received complex signal at instance n
at the receiver, all possible states
taking part in the Viterbi state transition are convolved with the estimated channel impulse response
where the constraint length C = {2 to 6}. Each in-phase and quadrature-phase part of the channel tap
is quantized to an 8-bit two's complement number. The channel estimates are normalized prior to loading into the
ECCP; such that the worst-case summation of the hI(n) or hQ(n) are confined within a 10-bit two's complement
number. The in-phase and quadrature-phase parts of the received complex signal
are also confined within a 10-bit two's complement number. The Euclidean branch metric associated with each of
the 2
C
state transitions is calculated as:
where
and
The absolute values of the difference signal are saturated at the level 0xFF. The sixteen most significant bits of this
17-bit incremental branch metric are retained for the add-compare-select operation of the Viterbi algorithm.
The in-phase and quadrature-phase parts of the received complex signal are stored in the ZIG10 and ZQG32 reg-
isters respectively. The complex estimated channel taps (H5 through H0) are stored in the S5H5 through S0H0
registers such that the in-phase part of the channel occupies the upper byte, and the quadrature-phase part of the
channel occupies the lower byte.
Convolutional Decoding: Two types of distance computation are implemented for convolutional decoding. Con-
volutional decoding over a Gaussian channel is supported with a Euclidean distance measure for rate 1
⁄
1 and
1
⁄
2 convolutional encoding. Convolutional decoding preceded by the MLSE equalization or other linear/nonlinear
equalization is supported with Manhattan distance measure for rate 1
⁄
1 through 1
⁄
6 convolutional encoding.
Generating polynomials G(0),
. . .
, G(5) (up to six-delays corresponding to a constraint length of seven) can take
part in computing the estimated received signals E(0, k),
. . .
, E(5, k) associated with all possible state transitions
k = 0, 1, 2
C
– 1.
E n k
,
(
)
EI n k
,
(
)
j EQ n k
,
(
)
+
=
k
0 to 2
C
1
–
1
–
=
H n
( )
h n
( )
h n
1
–
(
)
h n
2
–
(
) …
h n
C
–
1
+
(
)
,
,
,
[
]
T
=
h n
( )
hI n
( )
j hQ n
( )
+
=
Z n
( )
ZI n
( )
j ZQ n
( )
+
=
BM n k
,
(
)
XI n k
,
(
)
2
XQ n k
,
(
)
2
+
=
XI n k
,
(
)
abs ZI n
( )
EI n k
,
(
)
–
{
}
=
XQ n k
,
(
)
abs ZQ n
( )
EQ n k
,
(
)
–
{
}
=
Содержание DSP1611
Страница 18: ...Chapter 1 Introduction...
Страница 27: ...Chapter 2 Hardware Architecture...
Страница 52: ...Chapter 3 Software Architecture...
Страница 116: ...Chapter 4 Instruction Set...
Страница 154: ...Chapter 5 Core Architecture...
Страница 176: ...Chapter 6 External Memory Interface...
Страница 208: ...Chapter 7 Serial I O...
Страница 237: ...Chapter 8 Parallel I O DSP1617 Only...
Страница 261: ...Chapter 9 Parallel Host Interface PHIF DSP1611 18 27 28 29 Only...
Страница 275: ...Chapter 10 Bit I O Unit...
Страница 284: ...Chapter 11 JTAG Test Access Port...
Страница 306: ...Chapter 12 Timer...
Страница 313: ...Chapter 13 Bit Manipulation Unit...
Страница 325: ...Chapter 14 Error Correction Coprocessor DSP1618 28 Only...
Страница 350: ...Chapter 15 Interface Guide...
Страница 367: ...Appendix A Instruction Encoding...
Страница 379: ...Appendix B Instruction Set Summary...
Страница 381: ...aD extractz aS IM16 B 52 aD insert aS arM B 53 aD insert aS IM16 B 54 aD aS aaT B 55...
Страница 437: ...Index...