Linear Technology LTC3810-5, Техническое описание

Страница: 32 / 38

LTC3810-5
32
38105fd
C
IN
is chosen for an RMS current rating of about 3A at
85°C. The output capacitors are chosen for a low ESR
of 0.018Ω to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
D
V
OUT(RIPPLE)
=
D
I
L(MAX)
• ESR = 2.4A • 0.018
W
= 43mV
However, a 0A to 6A load step will cause an output change
of up to:
D
V
OUT(STEP)
=
D
I
LOAD
• ESR = 6A • 0.018Ω
= 108mV
An optional 10µF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 19.
PC Board Layout Checklist
When laying out a PC board follow one of two suggested
approaches. The simple PC board layout requires a dedi-
cated ground plane layer. Also, for higher currents, it is
recommended to use a multilayer board to help with heat
sinking power components.
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
• Place C
IN
, C
OUT
, MOSFETs, D1 and inductor all in one
compact area. It may help to have some components
on the bottom side of the board.
• Use an immediate via to connect the components to
ground plane including SGND and PGND of LTC3810-5.
Use several bigger vias for power components.
applicaTions inForMaTion
Figure 19. 12V to 60V Input Voltage to 5V/6A Synchronized at 250kHz
PGOOD
MODE_SYNC PGOOD
250kHz
CLOCK
V
ON
V
RNG
I
TH
SGND
UVIN
SHDN
V
FB
SGND PGND
PGND
SS/TRACK
I
ON
PLL/LPF
C
ON
100pF
C
SS
1000pF
V
IN
12V TO 60V
V
OUT
5V
6A
M3
ZXMN10A07F
C
C2
47pF
R
C
200k
R
FB2
1.91k
R
FB1
10k
LTC3810-5
EXTV
CC
TG
SENSE
–
BG
BGRTN
DRV
CC
INTV
CC
NDRV
BOOST
38105 F19
C
B
0.1µF
0.01µF
10k
78.7k
10k
C
DRVCC
0.1µF
C
VCC
1µF R
UV2
14.3k
R
UV1
200k
R
ON
110k
R
NDRV
100k
DB
BAS19
M1
SiR880DP
M2
SiR880DP
C5
1µF
D1
B1100
C
OUT1
270µF
6.3V
C
OUT2
10µF
6.3V
L1
10µH
SHDN
31
2
3
4
5
6
7
8
9
33
12
13
27
26
20
19
18
17
16
15
14
C
C1
5pF
C
IN1
68µF
100V
C
IN2
1µF
100V
SW
SENSE
+
25
24