LTC3810-5
13
38105fd
Fault Monitoring/Protection
Constant on-time current mode architecture provides ac-
curate cycle-by-cycle current limit protection—a feature
that is very important for protecting the high voltage power
supply from output short circuits. The cycle-by-cycle cur-
rent monitor guarantees that the inductor current will never
exceed the value programmed on the V
RNG
pin.
Foldback current limiting provides further protection if the
output is shorted to ground. As V
FB
drops, the buffered
current threshold voltage I
THB
is pulled down and clamped
to 1V. This reduces the inductor valley current level to
one-sixth of its maximum value as V
FB
approaches 0V.
Foldback current limiting is disabled at start-up.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a ±10% window around the regulation point after the
internal 120µs power bad mask timer expires. Furthermore,
in an overvoltage condition, M1 is turned off and M2 is
turned on immediately and held on until the overvoltage
condition clears.
The LTC3810-5 provides two undervoltage lockout com-
parators—one for the INTV
CC
/DRV
CC
supply and one for
the input supply V
IN
. The INTV
CC
UV threshold is 4.2V to
guarantee that the MOSFETs have sufficient gate drive
voltage before turning on. The V
IN
UV threshold (UVIN pin)
is 0.8V with 10% hysteresis which allows programming
the V
IN
threshold with the appropriate resistor divider
connected to V
IN
. If either comparator inputs are under
the UV threshold, the LTC3810-5 is shut down and the
drivers are turned off.
Strong Gate Drivers
The LTC3810-5 contains very low impedance drivers ca-
pable of supplying amps of current to slew large MOSFET
gates quickly. This minimizes transition losses and allows
paralleling MOSFETs for higher current applications. A
60V floating high side driver drives the top side MOSFET
and a low side driver drives the bottom side MOSFET
(see Figure 3). The bottom side driver is supplied directly
from the DRV
CC
pin. The top MOSFET drivers are biased
from floating bootstrap capacitor, C
B
, which normally is
recharged during each off cycle through an external diode
from DRV
CC
when the top MOSFET turns off. In pulse
skip mode operation, where it is possible that the bottom
MOSFET will be off for an extended period of time, an
internal timeout guarantees that the bottom MOSFET is
turned on at least once every 25µs for one on-time period
to refresh the bootstrap capacitor.
The bottom driver has an additional feature that helps
minimize the possibility of external MOSFET shoot-through.
When the top MOSFET turns on, the switch node dV/dt
pulls up the bottom MOSFET’s internal gate through the
Miller capacitance, even when the bottom driver is holding
the gate terminal at ground. If the gate is pulled up high
enough, shoot-through between the top side and bottom
side MOSFETs can occur. To prevent this from occurring,
the bottom driver return is brought out as a separate pin
(BGRTN) so that a negative supply can be used to reduce
the effect of the Miller pull-up. For example, if a –2V sup-
ply is used on BGRTN, the switch node dV/dt could pull
the gate up 2V before the V
GS
of the bottom MOSFET has
more than 0V across it.
Figure 3. Floating TG Driver Supply and Negative BG Return
operaTion
BOOST
TG
SW
BG
BGRTN
DRV
CC
DRV
CC
LTC3810-5
M1
M2
+
+
V
IN
C
IN
V
OUT
C
OUT
D
B
C
B
L
38105 F03
0V TO –5V
IC/Driver Supply Power
The LTC3810-5’s internal control circuitry and top and
bottom MOSFET drivers operate from a supply voltage
(INTV
CC
, DRV
CC
pins) in the range of 4.5V to 14V. The
LTC3810-5 has two integrated linear regulator controllers
to easily generate this IC/driver supply from either the high
voltage input or from the output voltage. For best efficiency
the supply is derived from the input voltage during start-up
and then derived from the lower voltage output as soon
as the output is higher than 4.7V. Alternatively, the supply
can be derived from the input continuously if the output is
