LTC3810-5
27
38105fd
Figure 14. Secondary Output Loop
In addition to providing a logic input to force continu-
ous operation, the MODE/SYNC pin provides a mean to
maintain a flyback winding output when the primary is
operating in pulse skip mode. The secondary output V
OUT2
is normally set as shown in Figure 14 by the turns ratio
N of the transformer. However, if the controller goes into
pulse skip mode and halts switching due to a light primary
load current, then V
OUT2
will droop. An external resistor
divider from V
OUT2
to the MODE/SYNC pin sets a minimum
voltage V
OUT2(MIN)
below which continuous operation is
forced until V
OUT2
has risen above its minimum.
V
OUT2(MIN)
=
0.8V 1
+
R4
R3
⎛
⎝⎜
⎞
⎠⎟
Fault Conditions: Current Limit and Foldback
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
the LTC3810-5, the maximum sense voltage is controlled
by the voltage on the V
RNG
pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
I
LIMIT
=
V
SNS(MAX)
R
DS(ON)
ρ
T
+
1
2
∆
I
L
The current limit value should be checked to ensure that
I
LIMIT(MIN)
> I
OUT(MAX)
. The minimum value of current
limit generally occurs with the largest V
IN
at the highest
ambient temperature, conditions that cause the largest
power loss in the converter. Note that it is important to
check for self-consistency between the assumed MOSFET
junction temperature and the resulting value of I
LIMIT
which heats the MOSFET switches.
Caution should be used when setting the current limit based
upon the R
DS(ON)
of the MOSFETs. The maximum current
limit is determined by the minimum MOSFET on-resistance.
Data sheets typically specify nominal and maximum values
for R
DS(ON)
, but not a minimum. A reasonable assumption
is that the minimum R
DS(ON)
lies the same percentage
below the typical value as the maximum lies above it.
Consult the MOSFET manufacturer for further guidelines.
To further limit current in the event of a short-circuit to
ground, the LTC3810-5 includes foldback current limiting.
If the output falls by more than 50%, then the maximum
sense voltage is progressively lowered to about one-tenth
of its full value.
Be aware also that when the fault timeout is enabled for
the external NMOS regulator, an over current limit may
cause the output to fall below the minimum 4.5V UV
threshold. This condition will cause a linear regulator time-
out/restart sequence as described in the Linear Regulator
Timeout section if this condition persists.
Soft-Start and Tracking
The LTC3810-5 has the ability to either soft-start by itself
with a capacitor or track the output of another supply.
When the device is configured to soft-start by itself, a
capacitor should be connected to the TRACK/SS pin. The
LTC3810-5 is put in a low quiescent current shutdown
state (I
Q
~240µA) if the
SHDN
pin voltage is below 1.5V.
The TRACK/SS pin is actively pulled to ground in this
shutdown state. Once the
SHDN
pin voltage is above
1.5V, the LTC3810-5 is powered up. A soft-start current
of 1.4µA then starts to charge the soft-start capacitor C
SS
.
Note that soft-start is achieved not by limiting the maxi-
mum output current of the controller but by controlling
the ramp rate of the output voltage. Current foldback is
disabled during this soft-start phase. During the soft-start
phase, the LTC3810-5 is ramping the reference voltage
until it reaches 0.8V. The force continuous mode is also
applicaTions inForMaTion
V
IN
LTC3810-5
SGND
FCB
TG
SW
R3
R4
38105 F14
T1
1:N
BG
PGND
+
C
OUT2
1µF
V
OUT1
V
OUT2
V
IN
+
C
IN
1N4148
•
•
+
C
OUT
