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LGE Internal Use Only
Copyright © 01 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.2.14 Power Down Sequence
Setting bit OFF in the GeneralControl register switches the system into OFF mode. After the turn off event, the
state-machine switches to the SHUTDOWN state. The reset_pmu_n_o signal changes to low, the I/O pads are
isolated using the padisolation_n signal, the LCORE LDO and the SD1 DC/DC converter are switched off, the
LPMU LDO is switched to ultra-low power mode, the DCXO is turned off and the bandgap buffer is disabled.
Before switching OFF the software shall have enabled the 32 kHz oscillator and has switched the PMU clock to
the 32 kHz clock to archive the target OFF current
the 32 kHz clock to archive the target OFF current
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