B-16
KLP 073008
B.61 STATus:PRESet COMMAND
STAT:PRES
Syntax
:
Short Form: STAT:PRES
Long Form: STATus:PRESet
Description:
Disables reporting of all status events.
This command sets all bits of the Operation Condition
(Table B-2) and Questionable Condition Registers to 0, preventing all status events from being
reported. (See example, Figure B-6.)
B.62 STATus:QUEStionable[:EVENt]? QUERY
STAT:QUES?
Syntax
:
Short Form: STAT:QUES[EVEN]?
Long Form: STATus:QUEStionable[EVENT]?
Return Value: <int_value> actual register value
Description:
Indicates questionable events that occurred since previous STAT:QUES? query.
Returns the
value of the Questionable Event register (see Table B-3). The Questionable Event register is a
read-only register which holds (latches) all events. Reading the Questionable Event register clears it.
(See example, Figure B-6.)
NOTE: Removing source power from the unit (e.g., setting POWER ON/OFF diuretic breaker to OFF)
causes the unit to generate and store the PWR bit. Therefore the first query of the Questionable Event
Register after the unit is turned on will always show a PWR fault - this is normal.
B.63 STATus:QUEStionable:CONDition? QUERY
STAT:QUES:COND?
Syntax
:
Short Form: STAT:QUES:COND?
Long Form: STATus:QUEStionable:CONDition?
Return Value: <int_value> actual register value
Description:
Returns the value of the Questionable Condition Register (see Table B-3).
The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply. Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false). (See
example, Figure B-6.)
B.64 STATus:QUEStionable:ENABle COMMAND
STAT:QUES:ENAB
Syntax
:
Short Form: STAT:QUES:ENAB <int_value> Long Form: STATus:QUESionable:ENABle
<int_value>
Function:
Programs Questionable Condition Enable Register.
Description:
Programs Questionable Condition Enable Register (see Table B-3).
The Questionable Condition
Enable Register determines which conditions are allowed to set the Questionable Condition Register;
it is a mask for enabling
specific bits in the Questionable Event register that can cause the question-
able summary bit (bit 3) of the Status Byte register to be set. The questionable summary bit is the log-
ical OR of all the enabled bits in the Questionable Event register
.
Bit set to 1 = function enabled
(active, true); bit reset to 0 = function disabled (inactive, false)
.
(See example, Figure B-6.)
B.65 STATUS:QUESTIONABLE:ENABLE? QUERY
STAT:QUES:ENAB?
Syntax
:
Short Form: STAT:QUES:ENAB? Long Form: STATus:QUESionable:ENABle?
Return Value: <int_value> actual register value
Description:
Reads Questionable Condition Enable Register (see Table B-3).
Power supply returns value of
Questionable Condition Enable Register, indicating which conditions are being monitored. Bit set to 1
TABLE B-3. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION
NU
FAN
PWR
OTP
OLF
OCP
OVP
BIT
15 - 6
5
4
3
2
1
0
VALUE
32,768 - 64
32
16
8
4
2
1
FAN - INTERNAL FAN FAILURE
PWR - LOSS OF SOURCE POWER
OTP - OVERTEMPERATURE
OLF - OUTPUT LEAD FAULT
OCP - OVERCURRENT
OVP - OVERVOLTAGE
NU - NOT USED
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