Keithley 2015, Руководство по обслуживанию

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4-14 Troubleshooting
DSP
U329 is a ADSP21061 digital signal processor that acquires ADC data, performs all distor-
tion and noise calculations, and communicates the results to the microprocessor. The DSP has a
48-bit data bus and provides a 32-bit address bus. It has serial ports for communicating with
serial peripherals such as the ADC and DAC converters. The DSP also has 1Mb of internal RAM
for temporary data storage.
The DSP clock frequency of 33.0 MHz is controlled by oscillator Y303. DSP reset is per-
formed by U333 through U327 and U326.
ROM U330 stores the firmware code for the DSP.
JTAG interface
J3 is the JTAG interface, and it is used for monitoring and debugging DSP code.
FPGA
U327 is an FPGA that provides all interface functions among the DSP, sine generator opto-
isolators, distortion analog circuitry, and the microprocessor. Upon power-up, the FPGA is con-
figured by U326, an EEPROM.
Opto-isolators
U312, U313, U317, and U322 are drivers for the opto-isolators U316, U317, U318, U319,
U320, U321, and U304. These isolators eliminate leakage currents and ground currents among
the analog, digital, and sine wave generator circuits.