Intel UltraBookIIi, Руководство пользователя

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A–2 UltraBookIIi User Guide
The basic motherboard architecture is based on the Sun
Ultra AXi reference design. The Sun Ultra AXi
reference design consists of a Sun UltraSPARC-IIi
processor and processor complex. The processor
complex includes an external cache RAM, system data
buffers, and clock generator.
The processor complex supports the system processor
and administers the UPA (UltraSPARC-IIi Port
Architecture) bus. Joining the UPA bus to the system's
dual PCI buses is the APB chip. This makes the Sun
Ultra AXi architecture unique among Sun architecture
by allowing it to use the PCI bus as its main I/O bus.
A PCIO connects the PCI bus to low-level I/O
functionality, including the E-bus and the Ethernet
media access layer. The Ethernet media access layer
bridges the Ethernet MDO layer with the Media
Independent Interface (MII) layer.
The E-bus is a low-level peripheral interface providing
connection to the flash boot memory, NVRAM, and PSM
bus interface. The PSM bus provides connection to the
system's intelligent power supply module.
A RIC chip (Reset Interrupt Controller) handles the
timing necessary to support power-on reset of the
motherboard. The RIC chip also manages the interrupts
generated on the motherboard for further processing by
the UPA bus and the system processor.
An embedded EIDE controller provides all hard disk
capability and access.
SPARC Compatibility
The 400 series UltraBookIIi uses a SPARC-compatible
motherboard, based on the Sun UltraSPARC-IIi
processor, and runs at 400 MHz, depending on your
configuration. The 400 series UltraBookIIi also uses the
Sun LSI chipsets for compatibility. As a result, any
hardware or peripheral device compatible with Sun
workstations is fully compatible with the UltraBookIIi.