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©2018 Integrated Device Technology, Inc.
August 30, 2018
Register Descriptions
The register descriptions section describes the behavior and function of the customer-programmable non-volatile-memory registers in the
VersaClock 6E family of clock generators.
showcases the array of products under the VersaClock 6E family.
For details of product operation, refer to the product datasheet.
VersaClock 6E Family Register Set
The device contains volatile (RAM) 8-bit registers and non-volatile 8-bit registers (
). The non-volatile registers are One-Time
Programmable (OTP), and bit values can only be changed from 1 (unburned state) to 0.
The OTP registers include factory trim data and four user configuration tables (
). This document does not describe the
format or methods for programming factory trim data, which is programmed by the factory before shipment.
Each configuration table contains all the information to set up the device's output frequencies. When these configuration tables are
programmed, the device will automatically load the RAM registers with the desired configuration on power-up. The device initializes in
either I
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C mode or selection-pin mode, depending on the state of the OUT0/SELB_I2C pin on power-up, and remains in the selected
mode until power is toggled (
). When powered up in I²C mode, the first configuration table, CFG0, is loaded. When powered up in
selection-pin mode, the SEL0 and SEL1 inputs are decoded to select one of the four configuration tables CFG0-CFG3.
The RAM registers (
) include Status registers for read-back of the device's operating conditions in I
2
C mode.
Figure 1. Register Maps
Table 1. VersaClock 6E Family Products
Product
Description
Package
5P49V6965
5-Output VersaClock 6E
24 pins
5P49V6967
8-Output VersaClock 6E with 4 LP-HCSL Outputs
40 pins
5P49V6968
12-Output VersaClock 6E with 8 LP-HCSL Outputs
48 pins
5P49V6975
5-Output VersaClock 6E with Internal Crystal
24 pins
VersaClock
®
6E Family Register Descriptions
and Programming Guide
