IBM z13s, Техническое руководство

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IBM z13s Technical Guide
򐂰 CICS/TS V2R3 and later.
򐂰 DB2 UDB for z/OS Version 8 and later.
򐂰
IMS Version 8 and later.
򐂰 zIIP Assisted HiperSockets for large messages.
The functioning of a zIIP is transparent to application programs.
In z13s, the zIIP processor is designed to run in SMT mode, with up to two threads per
processor. This new function is designed to help improve throughput for zIIP workloads and
provide appropriate performance measurement, capacity planning, and SMF accounting
data. This support is available for z/OS V2.1 with PTFs or later at z13s general availability.
Use the PROJECTCPU option of the IEAOPTxx parmlib member to help determine whether zIIPs
can be beneficial to the installation. Setting PROJECTCPU=YES directs z/OS to record the
amount of eligible work for zIIPs in SMF record type 72 subtype 3. The field APPL% IIPCP of
the Workload Activity Report listing by WLM service class indicates the percentage of a
processor that is zIIP eligible. Because of the zIIP lower price as compared to a CP, a
utilization as low as 10% might provide benefits.
7.3.3 Transactional Execution
The IBM zEnterprise EC12 introduced an architectural feature called
Transactional Execution
(TX). This capability is known in academia and industry as
hardware transactional memory
.
Transactional execution is also implemented in z13, z13s, and zBC12 servers.
This feature enables software to indicate to the hardware the beginning and end of a group of
instructions that need to be treated in an atomic way. Either all of their results happen or none
happens, in true transactional style. The execution is optimistic. The hardware provides a
memory area to record the original contents of affected registers and memory as the
instruction’s execution takes place. If the transactional execution group is canceled or must be
rolled back, the hardware transactional memory is used to reset the values. Software can
implement a fallback capability.
This capability enables more efficient software by providing a way to avoid locks (
lock elision
).
This advantage is of special importance for speculative code generation and highly
parallelized applications.
TX is used by IBM JVM, but potentially can be used by other software. z/OS V1R13 with
PTFs or later is required. The feature also is enabled for the Linux distributions SUSE Linux
Enterprise Server 11 SP3, RHEL6.4, SUSE Linux Enterprise Server 12, and RHEL7.