IBM x3850 X5, Руководство по внедрению

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IBM eX5 Implementation Guide
5.10.5 Memory sparing
The HX5 supports DIMM sparing, but only on the DIMMs that are installed in the HX5, not in
the MAX5. For more information about memory sparing, see “Memory sparing” on page 29.
Table 5-20 shows the installation order when one processor is installed.
Table 5-20 DIMM installation for the HX5 memory sparing: One processor
Table 5-21 shows the installation order when two processors are installed.
Table 5-21 DIMM installation for the HX5 memory sparing: Two processors
Sparing:
򐂰 Rank sparing is not supported on the HX5.
򐂰 MAX5 does not support rank sparing or DIMM sparing. Rank sparing or DIMM sparing
works on an HX5 with a MAX5, but memory is only spared on the HX5.
Numbe
r of
p
roc
ess
or
s
Numbe
r of
DIMMs
Processor 1 Processor 2
Buffer Buffer Buffer Buffer Buffer Buffer Buffer Buffer
DIMM 1 DIMM 2 DIMM 3 DIMM 4 DIMM 5 DIMM 6 DIMM 7 DIMM 8 DIMM 9 DIMM 10 DIMM 11 DIMM 12 DIMM 13 DIMM 14 DIMM 15 DIMM 16
1 4 x x x x
1 8 x x x x x x x x
Number of pr
ocess
or
s
Number of DIMMs
Processor 1 Processor 2
Buffer Buffer Buffer Buffer Buffer Buffer Buffer Buffer
DIMM 1 DIMM 2 DIMM 3 DIMM 4 DIMM 5 DIMM 6 DIMM 7 DIMM 8 DIMM 9 DIMM 10 DIMM 11 DIMM 12 DIMM 13 DIMM 14 DIMM 15 DIMM 16
2 4 x x x x
2 8 x x x x x x x x
2 12 x x x x x x x x x x x x
2 16 x x x x x x x x x x x x x x x x
Redundant bit steering: Redundant bit steering (RBS) is not supported on the HX5
because the integrated memory controller of the Intel Xeon 7500 processors does not
support the feature. See “Redundant bit steering” on page 29 for details.
The MAX5 memory expansion blade supports RBS, but only with x4 memory and not x8
memory. As shown in Table 5-13 on page 194, the 8 GB DIMM, part number 49Y1554,
uses x4 DRAM technology. RBS is automatically enabled in the MAX5 memory port, if all
DIMMs installed to that memory port are x4 DIMMs.