I-Bus IBC 2600, Руководство пользователя

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Chapter 1 - Specifications
1-13 IBC 2600 User’s Guide
KEYBOARD INTERFACE
The SBC is compatible with an AT-type keyboard. The keyboard inter-
face is routed to the rear I/O transition. Keyboard voltage is protected by
a self-resetting fuse.
Note that only one keyboard may be used; it may be attached either to
the front panel or to the rear I/O transition.
WATCHDOG TIMER
The watchdog timer is a hardware timer which resets the SBC if the timer
is not refreshed by software periodically. The timer is typically used to
restart a system in which an application becomes hung on an external
event. When the application is hung, it no longer refreshes the timer. The
watchdog timer then times out and resets the SBC.
The watchdog timer has two levels of enable. First, the watchdog timer
jumper must be moved to the ”enabled” position, which puts the watch-
dog timer under software control.
The second level involves software control of the watchdog’s timer retrig-
gering. Bit 6 of the 82371EB GPOREG register at I/O address 437H
must be set to a zero (0), which blocks the triggering clock to the watch-
dog timer circuit, thus scheduling a hardware reset in about 1.5 seconds.
To refresh the watchdog timer, the software in the application toggles bit
6 of the GPOREG register. First the bit must be set to a one (1) to clear
the watchdog timer delay; then it must be set to a zero (0), which sched-
ules a system reset in 1.5 seconds. Toggling bit 6 of the GPOREG must
occur within a period of less than 1.5 seconds to insure that a system
reset is not issued.
A set of watchdog timer software code and sample programs are avail-
able from Technical Support.
POWER FAIL DETECTION
A hardware reset is issued when on-board +5V or 3.3V voltage drops
below 4.75 volts.
BATTERY
A built-in lithium battery is provided, for ten years of data retention for
CMOS memory.