I-Bus IBC 2600, Руководство пользователя

Страница: 114 / 140

Appendix 1 - BIOS Messages
A1-10
IBC 2600 User’s Guide
PORT 80 CODES (continued)
Code Description
38 Initializing bus (input, IPL, general devices) next, if present. (See end
of Port 80H Codes for details of different buses.)
39 Displaying bus initialization error messages. (See end of Port 80H
Codes for details of different buses.)
3A New cursor position read and saved. Displaying ”Hit <DEL>” message
next.
3B “Hit <DEL>“ message displayed. Protected mode memory test about
to start.
40 Preparing descriptor tables next.
42 Descriptor tables prepared. Entering protected mode for memory test
next.
43 Entered protected mode. Enabling interrupts for diagnostics mode
next.
44 Interrupts enabled (if diagnostics switch is on). Initializing data to
check memory wraparound at 0:0 next.
45 Data initialized. Checking for memory wraparound at 0:0 and finding
total system memory size next.
46 Memory wraparound test done. Memory size calculation done. Writing
patterns to test memory next.
47 Memory pattern written to extended memory. Writing patterns to base
640KB memory next.
48 Patterns written in base memory. Determining amount of memory
below 1 MB memory next.
49 Amount of memory below 1 MB found and verified. Determining
amount of memory above 1 MB memory next.
4B Amount of memory above 1 MB found and verified. Checking for soft
reset and clearing memory below 1 MB for soft reset next. (if power-on
situation, going to checkpoint 4EH next.)
4C Memory below 1 MB has been cleared via soft reset. Clearing memory
above 1MB next.
4D Memory above 1 MB has been cleared via soft reset. Saving memory
size next. (Going to checkpoint 52H next.)
4E Memory test started, but not as result of soft reset. Displaying first
64KB memory size next.
4F Memory size display started. Display is updated during memory test.
Performing sequential and random memory tests next.