Rev. 1.00
32
August 29, 2018
Rev. 1.00
33
August 29, 2018
HT45F6530
AC Voltage Regulator Flash MCU
HT45F6530
AC Voltage Regulator Flash MCU
EEPROM Data Memory
This device contains an area of internal EEPROM Data Memory. EEPROM is by its nature a non-
volatile form of re-programmable memory, with data retention even when its power supply is
removed. By incorporating this kind of data memory, a whole new host of application possibilities
are made available to the designer. The availability of EEPROM storage allows information such
as product identification numbers, calibration values, specific user data, system setup data or other
product information to be stored directly within the product microcontroller. The process of reading
and writing data to the EEPROM memory has been reduced to a very trivial affair.
EEPROM Data Memory Structure
The EEPROM Data Memory capacity is 32×8 bits for the device. Unlike the Program Memory and
RAM Data Memory, the EEPROM Data Memory is not directly mapped into memory space and
is therefore not directly addressable in the same way as the other types of memory. Read and Write
operations to the EEPROM are carried out in single byte operations using an address and a data
register in Bank 0 and a single control register in Bank 1.
EEPROM Registers
Three registers control the overall operation of the internal EEPROM Data Memory. These are the
address registers, EEA, the data register, EED and a single control register, EEC. As both the EEA
and EED registers are located in Bank 0, they can be directly accessed in the same way as any other
Special Function Register. The EEC register however, being located in Bank1, cannot be directly
addressed directly and can only be read from or written to indirectly using the MP1 Memory Pointer
and Indirect Addressing Register, IAR1. Because the EEC control register is located at address 40H
in Bank 1, the MP1 Memory Pointer must first be set to the value 40H and the Bank Pointer register,
BP, set to the value, 01H, before any operations on the EEC register are executed.
Register
Name
Bit
7
6
5
4
3
2
1
0
EEA
—
—
—
EEA4
EEA3
EEA2
EEA1
EEA0
EED
D7
D6
D5
D4
D3
D2
D1
D0
EEC
—
—
—
—
WREN
WR
RDEN
RD
EEPROM Register List
• EEA Register
Bit
7
6
5
4
3
2
1
0
Name
—
—
—
EEA4
EEA3
EEA2
EEA1
EEA0
R/W
—
—
—
R/W
R/W
R/W
R/W
R/W
POR
—
—
—
0
0
0
0
0
Bit 7~5
Unimplemented, read as “0”
Bit 4~0
EEA4~EEA0
: Data EEPROM address bit 4~bit 0
• EED Register
Bit
7
6
5
4
3
2
1
0
Name
D7
D6
D5
D4
D3
D2
D1
D0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
0
0
0
0
0
0
0
0
Bit 7~0
D7~D0
: Data EEPROM data bit 7~bit 0