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L100DN Inverter
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The table below expands Byte 0 in the preceding table.
Inverter Status
– The following table describes the Inverter Status (Byte 1) for all host
output instances (P_47=70, P_47=71, and P_47=101).
Inverter Produced Data, Status Byte
Bit
Name
Bit = 0
Bit = 1
0
FW Run
Inverter stopped or in RV
Inverter in FW Run
1
RV Run
Inverter stopped or in FW
Inverter in RV Run
2
Trip
No faults exist
Trip exists, not cleared
3
—
—
—
4
Frequency arrival
Inverter stopped, or in accel or
decel
Inverter output arrived at
target freq.
5
Input terminal [1]
Input [1] = OFF
Input [1] = ON
6
Input terminal [2]
Input [2] = OFF
Input [2] = ON
7
Input terminal [3]
Input [3] = OFF
Input [3] = ON
Inverter Produced Data, Inverter State Code Byte
Code
(dec.)
Description
0
The inverter is Stop Mode.
1
The inverter is in Run Mode.
2
The inverter is in Jog Mode.
3
The inverter is in Stop Mode and the motor output is free running (coasting).
4
The inverter is executing DC braking (includes CD braking wait time).
5
The inverter is attempting a restart with frequency matching (B_01 = 03).
6
The output is stopped for an instantaneous power failure.
7
The inverter is attempting a restart with frequency matching (B_01 = 02).
8
The inverter is waiting before it attempts a restart with frequency matching. The wait
time is set by parameter B_03.
9
The inverter is in a trip condition, and is storing the trip history data to EEPROM. A
Stop/Reset command to clear the trip is ignored in this state.
10
The inverter is in a trip condition.
11
An under-voltage condition exists at the inverter power input.
Содержание L100DN DeviceNet Series Addendum
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