¾
Enhanced DMA Controller
—Two cascaded 8237 DMA controllers
—Supports LPC DMA
¾
SMBus
—Faster speed, up to 100 kbps
—Flexible SMBus/SMLink architecture to optimize for ASF
—Provides independent manageability bus through SMLink interface
—Supports SMBus 2.0 Specification
—Host interface allows processor to communicate via SMBus
—Slave interface allows an internal or external Microcontroller to access system resources
—Compatible with most two-wire components that are also I2C compatible
¾
High Precision Event Timers
—Advanced operating system interrupt scheduling