1. Hardware Engineering Specification
1.1 Introduction
The 9270D motherboard implements Intel’s Calpella platform with Arrandale mobile processor. Arrandale is the
next generation of 64-bit, multi-core mobile processors built on 32-nanometer process technology. Throughout this
document, Arrandale may be referredto as simply the processor. Based on the low-power/high-performance
Nehalem microarchitecture, the processor is designed for a two-chip platform as opposed to the traditional three-
chip platforms (processor, GMCH, and ICH). The two-chip platform consists of a processor and the Platform
Controller Hub (PCH) and enables higher performance, lower cost, easier validation, and improved x-y footprint.
Included in this family of processors is an integrated memory controller (IMC) and integrated I/O (IIO) (such as
PCI Express* and DMI) on a single-silicon die. This singledie solution is known as a monolithic processor.
The Ibex Peak provides extensive I/O support. Functions and capabilities include:
¾
PCI Express* Base Specification, Revision 2.0 support for up to eight ports.
¾
PCI Local Bus Specification, Revision 2.3 support for 33 MHz PCI operations
(supports up to four Req/Gnt pairs).
¾
ACPI Power Management Logic Support, Revision 3.0b
¾
Enhanced DMA controller, interrupt controller, and timer functions
