4.9 Power Management Interface Signals –Table 5
Name
Type
Description
WAKE#
I
PCI Express* Wake Event:
Sideband wake signal on PCI
Express asserted by components requesting wake up.
SUS_STAT# /
GPIO61
O
Suspend Status:
This signal is asserted by the Ibex Peak to
indicate that the system will be entering a low power state
soon. This can be monitored by devices with memory that need
to switch from normal refresh to suspend refresh mode. It can
also be used by other peripherals as an indication that they
should isolate their outputs that may be going to powered-off
planes. Pin may also be used as GPIO61.
SUSCLK /
GPIO62
O
Suspend Clock:
This clock is an output of the RTC generator
circuit to use by other chips for refresh clock. Pin may also be
used as GPIO62.
DRAMPWRO
K
O
DRAM Power OK:
This signal should connect to the
Processor’s SM_DRAMPWROK pin. The PCH asserts this pin
to indicate when DRAM power is on.
NOTES:
1. This pin should have External pull-up to the an always on
Voltage level of 1.05 V / 1.1 V
PMSYNC#
O
Power Management Sync:
Provides state information from
the PCH to the Processor relevant to C-state transitions.
CLKRUN# /
GPIO32
(Desktop Only)
I/O
PCI Clock Run:
Used to support PCI CLKRUN protocol.
Connects to peripherals that need to request clock restart or
prevention of clock stopping.
