4.4 PCI Interface Signals –Table 5
Name
Type
Description
PERR#
I/O
Parity Error:
An external PCI device drives PERR# when it
receives data that has a parity error. The Ibex Peak drives
PERR# when it detects a parity error. The Ibex Peak can
either generate an NMI# or SMI# upon detecting a parity
error (either detected internally or reported via the PERR#
signal).
ٛٛٛٛٛ
REQ0#
REQ1#/
GPIO50
REQ2#/
GPIO52
REQ3#/
GPIO54
I
PCI Requests:
The Ibex Peak supports up to 4 masters on the
PCI bus. REQ[3:1]# pins can instead be used as GPIO.
GNT0#
GNT1#/
GPIO51
GNT2#/
GPIO53
GNT3#/
GPIO55
O
PCI Grants:
The Ibex Peak supports up to 4 masters on the
PCI bus. GNT[3:1]# pins can instead be used as GPIO. Pull-
up resistors are not required on these signals. If pull-ups are
used, they should be tied to the Vcc3_3 power rail.
NOTE:
GNT[3:0]# are sampled as a functional strap.
See Section 4.30 for details.
CLKIN_PCILO
O PBACK
I
PCI Clock:
This is a 33 MHz clock feedback input to reduce
skew between PCH PCI clock and clock observed by
connected PCI devices. This signal must be connected to one
of the pins in the group CLKOUT_PCI[4:0]
