60
60
60
60
J4: Programming mode(PRMODE) enable
When REMOVED, the FPGA EEPROM works as an ordinary serial
configuration PROM. When SHORT, the FPGA EEPROM is switched to the
programming mode. In this mode it can be accessed as an I2C serial memory.
The details about the EEPROM programming can be found in the FPGA
EEPROM chapter.
J6: FPGA configuration mode (XMODE)
When REMOVED, the FPGA is configured by the content of the FPGA
configuration serial PROM. When SHORT, the FPGA is configured by a
standard parallel port cable.
NOTE: The XMODE signal is connected also to the pin 5 of the FPGA
programming connector K13, so when using a special (user made) cable,
it is not necessary to use the J6 jumper.
J11: SDA to FPGA EEPROM DIN connection
When SHORT, the FPGA EEPROM DIN pin is connected to the SDA signal on
the Mainboard.
J12: SCL to FPGA EEPROM CCLK connection
When SHORT, the FPGA EEPROM CCLK pin is connected to the SCL signal
on the Mainboard.
J29: FPGA enable
If this jumper is SHORT, all the FPGA output pins are tristated, so the FPGA is
in fact disconnected from the CPU.
NOTE: FPGA registers can be still written.
J10: Monitor Selection Jumper
For details on this jumper, see the Hardware Status Register description.
Miscellaneous
jumpers:
