Eaton XMCSPAN-001, Инструкция по установке и эксплуатации

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PEX8533 PCI EXPRESS SWITCH
The XMCspan provides an eight-lane (x8) PCI Express interface that expands the VME bus board. This PCI Express
interface is available at connector J3, and connected to the uplink port Port 0 of the PCI Express Switch PEX8533.
The PEX8533 gives PCI Express switching capability that conforms to the latest revision of the PCI Express Base
specification.
PEX8533 STATION AND PORT CONFIGURATION
The 32 PCI Express lanes are implemented equally across two stations, and are connected by the internal switch
fabric to the central RAM. Each station supports up to 16 SerDes modules that are integrated on the chip, and
provide the 32 PCI Express hardware interface lanes. The lanes can be combined to create one to three ports
per station. Each port implements the PCI Express Base R1.1 physical, data link, and transaction layer.
XMCSPAN STACKING
The XMCspan provides a second eight-lane (x8) PCI Express interface to allow a second XMCspan module to
be stacked on top of the VME base board. This interface is available at PCI Express expansion output connector
J4, and connected to the downlink port Port 8 of PEX8533.
MEZZANINE CARD SITES
The XMCspan has two mezzanine card sites that support XMC, PMC, and PrPMC modules. PMC-mode, XMC-
mode, or dual-mode mezzanine cards are also supported.
The mezzanine cards are compliant with:
• IEEE 1386-2001
• IEEE 1386.1-2001
• ANSI/VITA 32-2003
• ANSI/VITA 35-2000
• ANSI/VITA 39-2003
• ANSI/VITA 42.0-2005
• ANSI/VITA 42.3-2006
MEZZANINE CARD IDENTIFICATION
The mezzanine cards can be identified by reading the VPD serial EEPROM. The connector signals MSCL and
MSCA are connected to the I
2
C bus.
6806800H03A | XMCspan Installation and Use |
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Functional Description